PIC16(L)F18426/46 14/20-Pin Full-Featured, Low Pin Count Microcontrollers with XLP Description PIC16(L)F184XX microcontrollers feature Intelligent Analog, Core Independent Peripherals (CIPs) and communication peripherals combined with eXtreme Low-Power (XLP) for a wide range of general purpose and low-power applications. Features such as a 12-bit Analog-to-Digital Converter with 2 Computation (ADC ), Memory Access Partitioning (MAP), the Device Information Area (DIA), Power- saving operating modes, and Peripheral Pin Select (PPS), offer flexible solutions for a wide variety of custom applications. Core Features C Compiler Optimized RISC Architecture Only 50 Instructions Operating Speed: DC 32 MHz clock input 125 ns minimum instruction cycle Interrupt Capability 16-Level Deep Hardware Stack Timers: Up to two 24-bit timers Up to four 8-bit timers Up to four 16-bit timers Low-Current Power-on Reset (POR) Configurable Power-up Timer (PWRT) Brown-out Reset (BOR) Low-Power BOR (LPBOR) Option Windowed Watchdog Timer (WWDT): Variable prescaler selection Variable window size selection Configurable in hardware (Configuration Words) and/or software Programmable Code Protection Memory Up to 28 KB Program Flash Memory Up to 2 KB Data SRAM Memory Datasheet Preliminary DS40001985A-page 1 2017 Microchip Technology Inc. PIC16(L)F18426/46 256B Data EEPROM Direct, Indirect and Relative Addressing modes Memory Access Partition (MAP): Write-protect Customizable partition Device Information Area (DIA) Device Configuration Information (DCI) Operating Characteristics Operating Voltage Range: 1.8V to 3.6V (PIC16LF184XX) 2.3V to 5.5V (PIC16F184XX) Temperature Range: Industrial: -40C to 85C Extended: -40C to 125C Power-Saving Operation Modes Doze: CPU and Peripherals Running at Different Cycle Rates (typically CPU is lower) Idle: CPU Halted While Peripherals Operate Sleep: Lowest Power Consumption Peripheral Module Disable (PMD): Ability to selectively disable hardware module to minimize active power consumption of unused peripherals Extreme Low-Power mode (XLP) Sleep: 500 nA typical 1.8V Sleep and Watchdog Timer: 900 nA typical 1.8V eXtreme Low-Power (XLP) Features Sleep mode: 50 nA 1.8, typical Watchdog Timer: 500 nA 1.8V, typical Secondary Oscillator: 500 nA 32 kHz Operating Current: 8 uA 32 kHz, 1.8V, typical 32 uA/MHz 1.8V, typical Digital Peripherals Configurable Logic Cell (CLC): 4 CLCs Integrated combinational and sequential logic Complementary Waveform Generator (CWG): 2 CWGs DS40001985A-page 2 Datasheet Preliminary 2017 Microchip Technology Inc.