PL500-17TC Microchip

PL500-17 PL500-17 PL500-17 Low Phase Noise VCXO (17MHz to 36MHz) FEATURES PIN CONFIGURATION VCXO output for the 17MHz to 36MHz range Low phase noise (-130dBc 10kHz offset at XIN 1 8 XOUT 35.328MHz) 2 7 VDD* OE LVCMOS output with OE tri-state control 17 to 36MHz fundamental crystal input 3 6 VCON VDD* Integrated high linearity variable capacitors GND 4 5 CLK 8mA drive capability at TTL output 150 ppm pull range, max 5% (typ.) linearity SOP-8L Low jitter (RMS): 2.5ps period jitter 2.5 to 3.3V operation Available in 8-Pin SOP, 6-pin SOT23 GREEN/ 1 6 XOUT XIN RoHS compliant packages, or Die GND 2 5 VDD 3 4 CLK VCON DESCRIPTION SOT23-6L The PL500-17 is a low cost, high performance and : Denotes internal Pu ll-up low phase noise VCXO for the 17 to 36MHz range, *: Only one VDD pin needs to be connected providing less than -130dBc at 10kHz offset at 35.328MHz. The very low jitter (2.5 ps RMS period jitter) makes this chip ideal for applications requiring voltage controlled frequency sources. Input crystal can range from 17 to 36MHz (fundamental resonant mode). BLOCK DIAGRAM XIN Xtal CLK Osc XOUT Varicap VCON OE Micrel Inc. 2180 Fortune Drive San Jose, CA 95131 USA tel +1(408) 944 -0800 fax +1(408) 474-1000 www.micrel.com Rev 6/15/10 Page 1 PL500-17 Low Phase Noise VCXO (17MHz to 36MHz) DIE PAD LAYOUT DIE SPECIFICATIONS 32 mil (812,986) 8 Name Value 1 XIN XOUT Size 39 x 32 mil OE 7 Reverse side GND 2 VDD Pad dimensions 80 micron x 80 micron VDD 6 Thickness 8 mil VCON 3 CLK 5 GND 4 DIE ID: C500xxxxxx (0,0) Y X Note: denotes internal pull up PACKAGE PIN AND DIE PAD ASSIGNMENT Pin Die Pad Position Name Type Description SOP-8 SOT23-6 X ( m) Y ( m) XIN 1 6 94.183 768.599 I Crystal input pin. VDD power supply pin. Only one VDD pin is VDD 2 5 94.157 605.029 P necessary. VCON 3 4 94.183 331.756 I Frequency control voltage input pin. GND 4 2 94.193 140.379 P Ground pin. CLK 5 3 715.472 203.866 O Output clock pin. VDD power supply pin. Only one VDD pin is VDD 6 - 715.307 455.726 P necessary. Output Enable input pin. Disables the output OE* 7 - 715.472 626.716 I when low. Internal pull-up enables output by default if pin is not connected to low. XOUT 8 1 476.906 888.881 I Crystal output pin. Ref Clock input. * OE (Output Enable) pin is not available in SOT23-6L package, the output will always be enabled by the build in pull-up resister. Micrel Inc. 2180 Fortune Drive San Jose, CA 95131 USA tel +1(408) 944 -0800 fax +1(408) 474-1000 www.micrel.com Rev 6/15/10 Page 2 39 mil