32 Mbit SPI Serial Flash SST25VF032B SST25VF032B32Mb Serial Peripheral Interface (SPI) flash memory Data Sheet FEATURES: Single Voltage Read and Write Operations End-of-Write Detection 2.7-3.6V Software polling the BUSY bit in Status Register Busy Status readout on SO pin Serial Interface Architecture Hold Pin (HOLD ) SPI Compatible: Mode 0 and Mode 3 Suspends a serial sequence to the memory High Speed Clock Frequency without deselecting the device 80 MHz Max Write Protection (WP ) Superior Reliability Enables/Disables the Lock-Down function of the Endurance: 100,000 Cycles (typical) status register Greater than 100 years Data Retention Software Write Protection Low Power Consumption: Write protection through Block-Protection bits in Active Read Current: 10 mA (typical) status register Standby Current: 5 A (typical) Temperature Range Flexible Erase Capability Industrial: -40C to +85C Uniform 4 KByte sectors Packages Available Uniform 32 KByte overlay blocks Uniform 64 KByte overlay blocks 8-lead SOIC (200 mils) 8-contact WSON (5 X 6 mm) Fast Erase and Byte-Program: All devices are RoHS compliant Chip-Erase Time: 35 ms (typical) Sector-/Block-Erase Time: 18 ms (typical) Byte-Program Time: 7 s (typical) Auto Address Increment (AAI) Word Programming Decrease total chip programming time over Byte-Program operations PRODUCT DESCRIPTION The SST 25 series Serial Flash family features a four-wire, supply of 2.7-3.6V for SST25VF032B. The total energy SPI-compatible interface that allows for a low pin-count consumed is a function of the applied voltage, current, and package which occupies less board space and ultimately time of application. Since for any given voltage range, the lowers total system costs. SST25VF032B SPI serial flash SuperFlash technology uses less current to program and memories are manufactured with SSTs proprietary, high- has a shorter erase time, the total energy consumed during performance CMOS SuperFlash technology. The split-gate any Erase or Program operation is less than alternative cell design and thick-oxide tunneling injector attain better flash memory technologies. reliability and manufacturability compared with alternate The SST25VF032B device is offered in 8-lead SOIC (200 approaches. mils) and 8-contact WSON packages. See Figure 2 for pin The SST25VF032B devices significantly improve perfor- assignments. mance and reliability, while lowering power consumption. The devices write (Program or Erase) with a single power 2009 Silicon Storage Technology, Inc. The SST logo and SuperFlash are registered Trademarks of Silicon Storage Technology, Inc. S71327-03-000 05/09 These specifications are subject to change without notice. 132 Mbit SPI Serial Flash SST25VF032B Data Sheet SuperFlash X - Decoder Memory Address Buffers and Latches Y - Decoder I/O Buffers Control Logic and Data Latches Serial Interface CE SCK SI SO WP HOLD 1327 B1.0 Note: 1. In AAI mode, the SO pin can act as a RY/BY pin when configured as a ready/busy status pin. See End-of- Write Detection on page 11 for details FIGURE 1: Functional Block Diagram 2009 Silicon Storage Technology, Inc. S71327-03-000 05/09 2