SST49LF080A-33-4C-NHE-T Microchip

8 Mbit LPC Flash SST49LF080A Data Sheet The SST49LF080A flash memory device is designed to interface with the LPC bus for PC and Internet Appliance application in compliance with Intel Low Pin Count (LPC) Interface Specification 1.0. Two interface modes are supported: LPC mode for in-system operations and Parallel Programming (PP) mode to interface with programming equipment. The SST49LF080A flash memory device is manu- factured with proprietary, high-performance SuperFlash Technology. The split- gate cell design and thick-oxide tunneling injector attain better reliability and man- ufacturability compared with alternate approaches Features LPC Interface Flash Two Operational Modes SST49LF080A: 1024K x8 (8 Mbit) Low Pin Count (LPC) Interface mode for in-system operation ConformstoIntel LPC InterfaceSpecification 1.0 ParallelProgramming(PP)Modeforfastproductionpro- gramming Flexible Erase Capability LPC Interface Mode Uniform 4 KByte Sectors 5-signal communication interface supporting byte Read Uniform 64 KByte overlay blocks and Write 64 KByteTop Boot Block protection 33 MHz clock frequency operation Chip-Erase for PP Mode Only WP andTBL pins provide hardware write protect for Single 3.0-3.6V Read andWrite Operations entire chip and/or top boot block Standard SDP Command Set Data Polling andToggle Bit for End-of-Write detection Superior Reliability 5 GPI pins for system design flexibility Endurance: 100,000 Cycles (typical) 4 ID pins for multi-chip selection Greater than 100 years Data Retention Parallel Programming (PP) Mode Low Power Consumption 11-pin multiplexed address and 8-pin data Active Read Current: 6 mA (typical) I/O interface Standby Current: 10 A (typical) Supports fast programming In-System on programmer equipment Fast Sector-Erase/Byte-Program Operation Sector-EraseTime: 18 ms (typical) CMOS and PCI I/O Compatibility Block-EraseTime: 18 ms (typical) Chip-EraseTime: 70 ms (typical) Packages Available Byte-ProgramTime: 14 s (typical) 32-lead PLCC Chip RewriteTime: 16 seconds (typical) 32-leadTSOP (8mm x 14mm) Single-pulse Program or Erase Internal timing generation All non-Pb (lead-free) devicesareRoHScompliant 2014 Silicon Storage Technology, Inc. www.microchip.com DS20005086B 11/148 Mbit LPC Flash SST49LF080A Data Sheet Product Description SST49LF080A flash memory device is designed to interface with the LPC bus for PC and Internet Appliance application in compliance with Intel Low Pin Count (LPC) Interface Specification 1.0. Two interface modes are supported: LPC mode for in-system operations and Parallel Programming (PP) mode to interface with programming equipment. SST49LF080A flash memory device is manufactured with proprietary, high-performance SuperFlash Technology. The split-gate cell design and thick-oxide tunneling injector attain better reliability and manufacturability compared with alternate approaches. The SST49LF080A device significantly improves performance and reliability, while lowering power consumption. The SST49LF080A device writes (Program or Erase) with a single 3.0-3.6V power supply. It uses less energy during Erase and Program than alternative flash memory technologies. The total energy consumed is a function of the applied voltage, current and time of application. For any give voltage range, the SuperFlash technology uses less current to program and has a shorter erase time the total energy consumed during any Erase or Program operation is less than alternative flash memory technologies. The SST49LF080A product provides a maximum Byte-Program time of 20 sec. The entire memory can be erased and programmed byte-by-byte typically in 16 seconds when using status detection features such asToggle Bit or Data Polling to indicate the completion of Program operation. The SuperFlash technology pro- vides fixed Erase and Program time, independent of the number of Erase/Program cycles that have performed. Therefore the system software or hardware does not have to be calibrated or correlated to the cumulative number of Erase cycles as is necessary with alternative flash memory technologies, whose Erase and Program time increase with accumulated Erase/Program cycles. To meet high density, surface mount requirements, the SST49LF080A device is offered in 32-lead TSOP and 32-lead PLCC packages. See Figures 2 and 3 for pin assignments and Table 1 for pin descriptions. 2014 Silicon Storage Technology, Inc. DS20005086B 11/14 2