Precision Edge 6GHz, 1:2 FANOUT BUFFER/TRANSlATOR SY58013U Micrel, Inc. Precision Edge w/400mV l VPECl OUTPUTS and INTERNAl SY58013U INPUT TERMINATION FEATURES Precision 1:2, 400mV l VPECl fanout buffer Precision Edge low jitter performance: 55fs phase jitter (typ) RMS DESCRIPTION Accepts an input signal as low as 100mV Guaranteed AC performance over temperature and The SY58013U is a 2.5V/3.3V precision, high-speed, fully voltage: differential 1:2 LVPECL fanout buffer. Optimized to provide two identical output copies with less than 15ps of skew and > 6GHz f clock MAX only 55fs phase jitter, the SY58013U can process clock RMS < 80ps t /t times r f signals as fast as 6GHz or data patterns up to 10.7Gbps. < 250ps t pd The differential input includes Micrels unique, 3-pin input < 15ps max. skew termination architecture that interfaces to LVPECL, LVDS, Unique input termination and V pin accepts and CML differential signals, (AC- or DC-coupled) as small T DC-coupled and AC-coupled differential as 100mV without any level-shifting or termination resistor inputs: l VPECl, l VDS and CMl networks in the signal path. For AC-coupled input interface applications, an on-board output reference voltage (V 400mV l VPECl compatible outputs REF- ) is provided to bias the V pin. The outputs are 400mV AC T Power supply 2.5V 5% and 3.3V 10% LVPECL compatible, with extremely fast rise/fall times 40C to +85C temperature range guaranteed to be less than 80ps. Available in 16-pin (3mm x 3mm) QFN package The SY58013U operates from a 2.5V 5% supply or 3.3V 10% supply and is guaranteed over the full industrial temperature range (40C to +85C). For applications that require greater output swing or CML compatible outputs, consider the SY58012U 1:2 fanout buffer with 800mV LVPECL outputs, or the SY58011U 1:2 fanout buffer with APPlICATIONS 400mV CML outputs. The SY58013U is part of Micrels high-speed, Precision Edge product line. Datasheets and All SONET and All GigE clock distribution support documentation can be found on Micrels web site at Fibre Channel clock and data distribution www.micrel.com. Backplanes Data distribution: OC-48, OC-48+FEC, XAUI High-end, low-skew, multiprocessor synchronous clock distribution TYPICAl PERFORMANCE FUNCTIONAl BlOCk DIAGRAM United States Patent No. RE44,134 2GHz with 100mV Input Precison Edge is a registered trademark of Micrel, Inc. Rev.: F Amendment: /0 M9999-063010 1 Issue Date: November 2011 hbwhelp micrel.com or (408) 955-1690 Precision Edge SY58013U Micrel, Inc. PACkAGE/ORDERING INFORMATION (1) Ordering Information Package Operating Package Part Number Type Range Marking (3) SY58013UMG QFN-16 Industrial 013U with Pb-Free Pb-Free bar-line indicator (2, 3) SY58013UMGTR QFN-16 Industrial 013U with Pb-Free Pb-Free bar-line indicator Notes: 1. Contact factory for die availability. Dice are guaranteed at T = 25C, DC electricals only. A All devices are Pb-Free. 2. Tape and Reel. 3. Pb-Free package recommended for new designs. 16-Pin QFN PIN DESCRIPTION Pin Number Pin Name Pin Function 1, 4 IN, /IN Differential Input: This input pair is the signal to be buffered. Each pin is internally terminated with 50 ohms to the V pin. Note that this input will default to an indeterminate T state if left open. See Input Interface Applications section. 2 VT Input Termination Center-Tap: Each input terminates to this pin. The V pin provides a T center-tap for each input (IN, /IN) to a termination network for maximum interface flexibility. See Input Interface Applications section. 3 VREF-AC Reference Output Voltage: This output biases to V 1.2V. It is used for AC-coupled CC inputs (IN, /IN). Connect V directly to the V pin. Bypass with 0.01F low ESR REF-AC T capacitor to V . Maximum curent source or sink is 0.5mA. See Input Interface CC Applications section. 5, 8, 13, 16 VCC Positive Power Supply: Bypass with 0.1F//0.01F low ESR capacitors as close to the V pins as possible. CC 6, 7, 14, 15 GND, Ground. Exposed pad must be connected to a ground plane that is the same potential (Exposed Pad) as the ground pin. 12, 11 Q0, /Q0, LVPECL Differential Output Pairs: Differential buffered output copy of the input signal. The 9, 10 Q1, /Q1 output swing is typically 400mV. Unused output pairs may be left floating with no impact on jitter. See LVPECL Output Termination section. M9999-063010 2 hbwhelp micrel.com or (408) 955-1690