SY58608UMG-TR Microchip

SY58608U 3.2 Gbps Precision, 1:2 LVDS Fanout Buffer with Internal Termination and Fail Safe Input Features General Description Precision 1:2 LVDS Fanout Buffer The SY58608U is a 2.5V, high-speed, fully differential 1:2 LVDS fanout buffer optimized to provide two Guaranteed AC Performance Over Temperature identical output copies with less than 20 ps of skew and and Voltage: typical additive phase jitter. The SY58608U 130 fs RMS - DC-to > 3.2 Gbps Throughput can process clock signals as fast as 2 GHz or data - <300 ps Propagation Delay (IN-to-Q) patterns up to 3.2 Gbps. - <20 ps Within-Device Skew The differential input includes Microchips unique, 3-pin - <100 ps Rise/Fall Times input termination architecture that interfaces to Fail Safe Input LVPECL, LVDS or CML differential signals, (AC- or - Prevents Outputs From Oscillating When DC-coupled) as small as 100 mV (200 mV ) without PP Input Is Invalid any level-shifting or termination resistor networks in the signal path. For AC-coupled input interface Ultra-Low Jitter Design applications, an integrated voltage reference (V ) REF-AC - 130 fs Typical Additive Phase Jitter RMS is provided to bias the V pin. The outputs are 325 mV T - High-Speed LVDS Outputs LVDS, with rise/fall times guaranteed to be less than 2.5V 5% Power Supply Operation 100 ps. Industrial Temperature Range: 40C to +85C The SY58608U operates from a 2.5V 5% supply and Available In 16-pin (3 mm x 3 mm) QFN Package is guaranteed over the full industrial temperature range (40C to +85C). The SY58608U is part of Microchips Applications high-speed, Precision Edge product line. All SONET Clock And Data Distribution Fibre Channel Clock And Data Distribution Package Type Gigabit Ethernet Clock And Data Distribution SY58608U Backplane Distribution 3x3 QFN-16 Top View Markets DataCom Telecom Storage 16 15 14 13 ATE IN 1 12 Q0 Test and Measurement VT 2 11 /Q0 Q1 VREF-AC 3 10 /IN 4 9 /Q1 5 6 7 8 United States Patent No. RE44,134 2018 Microchip Technology Inc. DS20005605A-page 1 VCC VCC GND GND GND GND VCC VCCSY58608U Functional Block Diagram Q0 IN /Q0 50 V T 50 Q1 /IN /Q1 V REF-AC DS20005605A-page 2 2018 Microchip Technology Inc.