Precision Edge 3.3V 2.5Gbps SY89327L Micrel, Inc. Precision Edge ANY INPUT-to-LVPECL SY89327L DIFFERENTIAL TRANSLATOR FEATURES Input accepts virtually all logic standards: Precision Edge Single-ended: SSTL, TTL, CMOS Differential: LVDS, HSTL, CML DESCRIPTION Guaranteed AC performance over temp and voltage: DC-to >2.5Gbps data rate throughput The SY89327L is a fully differential, high-speed translator DC-to >2.5GHz clock f MAX optimized to accept any logic standard from single-ended < 400ps In-to-Out t pd TTL/CMOS to differential LVDS, HSTL, or CML and translate < 200ps t /t r f it to LVPECL. Translation is guaranteed for speeds up to Ultra-low jitter design: 2.5Gbps (2.5GHz toggle frequency). The SY89327L does 75fs RMS phase jitter not internally terminate its inputs because different interfacing Low power: 46mW (typ) standards have different termination requirements. 100k LVPECL output The SY89327L is a member of Micrels Precision Edge Flow-through pinout and fully differential design family of high-speed logic devices. This family features ultra- small packaging, as well as high signal integrity and Power supply 3.3V 10% operation at many different supply voltages. 40C to +85C temperature range All support documentation can be found on Micrels web Available in ultra-small 8-lead 2mm x 2mm QFN site at www.micrel.com. package APPLICATIONS High-speed logic Data communications systems Wireless communications systems Telecom systems TYPICAL APPLICATIONS CIRCUIT FUNCTIONAL BLOCK DIAGRAM NC 1 8 VCC IN 2 7 Q ANY IN LVPECL OUT /IN 3 6 /Q NC 4 5 VEE 8-Pin QFN (2mm x 2mm) Precision Edge is a registered trademark of Micrel, Inc. Rev.: C Amendment: /0 M9999-071707 1 Issue Date: July 2007 hbwhelp micrel.com or (408) 955-1690Precision Edge SY89327L Micrel, Inc. PACKAGE/ORDERING INFORMATION Ordering Information NC 1 8 VCC Package Operating Package Lead Part Number Type Range Marking Finish IN 2 7 Q SY89327LMGTR QFN-8 Industrial 327 with Pb-Free Pb-Free bar-line indicator NiPdAu /IN 3 6 /Q NC 4 5 GND 8-Pin QFN PIN DESCRIPTION Pin Number Pin Name Pin Function 2, 3 IN, /IN Differential inputs: This input is the differential signal input to the device. This input accepts AC- or DC-coupled signals as small as 100mV. External termination is required. Please refer to the Input Interface Applications section for more details. 8 VCC Positive power supply. Bypass with 0.1F 0.01F low ESR capacitors. 7, 6 Q, /Q Differential LVPECL Output: Terminate with 50 to V 2V. See Output Interface CC Applications section. Output pair is 100k temperature compensated LVPECL compatible. 5 GND, Ground: Ground pin and exposed pad must be connected to the same ground plane. Exposed Pad 1, 4 NC No connect. FUNCTIONAL DESCRIPTION Establishing Static Logic Inputs For LVDS applications, only point-to-point interfaces are Do not leave unused inputs floating. Tie either the true or supported. Due to the current required by the input structure complement input to ground. A logic zero is achieved by shown in Figure 1, multi-drop and multi-point architectures connecting the complement input to ground with the true are not supported. input floating. For a TTL input, tie a 2.5k resistor between V CC the complement input and ground. See Input Interface section. R2 R2 1.5k 1.5k Input Levels LVDS, CML, and HSTL differential signals may be D IN connected directly to the D inputs. Depending on the actual R1 1.05k worst case voltage seen, the SY8327L s performance varies /D IN as per the following table: R1 1.05k GND Input Voltage Minimum Maximum Figure 1. Simplified Input Structure Range Voltage Swing Translation Speed 0 to 2.4V 100mV 2.5Gbps 0 to V +0.3V 200mV 1.25Gbps CC M9999-071707 2 hbwhelp micrel.com or (408) 955-1690