SY89538L 3.3V, Precision LVPECL and LVDS Programmable Multiple Output Bank Clock Synthesizer and Fanout Buffer with Zero Delay General Description The SY89538L integrated programmable clock synthesizer and fanout is part of a precision PLL- based clock generation family optimized for Precision Edge enterprise switch, router, and multiprocessor server Features applications. This family is ideal for generating Integrated programmable synthesizer with multiple internal system timing requirements up to 750MHz for output dividers, fanout buffers, and clock drivers multiple ASICs, FPGAs, and NPUs. These devices Zero-delay capability: 29.375MHz to 756MHz integrate the following blocks into a single monolithic IC: Reference clock input: 9.325MHz to 756MHz PLL (Phase-Lock-Loop) based synthesizer Input MUX accepts a reference and a crystal (XTAL) source Zero-delay MUX and feedback capability Ideal for reference backup clock source or 1:4 LVPECL fanout system test frequency source 1:3 LVDS fanout Patent-pending unique input MUX isolates XTAL Clock generator (dividers) and reference inputs which minimizes crosstalk Guaranteed AC performance: Logic translation (LVPECL, LVDS) Output frequency range: 29.375MHz to 756MHz Five-independently programmable output <150ps total jitter PP banks <6ps cycle-to-cycle jitter (XTAL Input) RMS This level of integration minimizes additive jitter and <8ps deterministic jitter PP part-to-part skew associated with discrete <0.7ps crosstalk induced jitter alternatives, resulting in superior system-level timing RMS with reduced board space and power. For <75ps output-to-output skew applications that do not require a zero-delay function, TTL/CMOS-compatible control logic see the SY89537L. Five-independently programmable output All support documentation can be found on frequency banks: Micrels web site at: www.micrel.com. Four differential LVPECL output banks One differential LVDS output bank with three Applications output pairs Enterprise routers, switches, servers and Output bank synchronization control pin workstations Output enable Parallel processor-based systems 3.3V 10% power supply (2.5V output capable) Internal system clock generation for ASICs, NPUs Guaranteed over the industrial temperature range and FPGAs (-40C to +85C) Available in a 64-pin EPAD-TQFP Markets LAN/WAN Enterprise servers Test and measurement Precision Edge is a registered trademark of Micrel, Inc. MLF and MicroLeadFrame are registered trademarks of Amkor Technology. Micrel Inc. 2180 Fortune Drive San Jose, CA 95131 USA tel +1 (408) 944-0800 fax + 1 (408) 474-1000 Micrel, Inc. SY89538L Typical Application Functional Block Diagram January 2008 2 M9999-010808-E hbwhelp micrel.com or (408) 955-1690