SY89841U Precision LVDS Runt Pulse Eliminator 2:1 Multiplexer General Description The SY89841U is a low jitter LVDS, 2:1 input multiplexer (MUX) optimized for redundant source Precision Edge switchover applications. Unlike standard Features multiplexers, the SY89841U unique 2:1 Runt Pulse Selects between two sources, and provides a Eliminator (RPE) MUX prevents any short cycles or glitch-free, stable LVDS output runt pulses during switchover. In addition, a unique Guaranteed AC performance over temperature Fail-safe Input protection prevents metastable and supply voltage: conditions when the selected input clock fails to a wide operating frequency: 1kHz to >1.5GHz DC voltage (voltage between the pins of the <870ps In-to-Out t differential input drops below 100mV). pd <150ps t /t r f The differential input includes Micrels unique, 3-pin Unique patent-pending input isolation design input termination architecture that allows customers minimizes crosstalk to interface to any differential signal (AC- or DC- coupled) as small as 100mV (200mV ) without any Fail-safe input prevents oscillations pp level shifting or termination resistor networks in the Ultra-low jitter design: signal path. The outputs are 350mV, LVDS with fast <1ps random jitter rms rise/fall times guaranteed to be less than 150ps. <1ps cycle-to-cycle jitter rms <10ps total jitter (clock) The SY89841U operates from a 2.5V 5% supply pp <0.7ps MUX crosstalk induced jitter and is guaranteed over the full industrial rms temperature range of 40C to +85C. The Unique patent-pending input termination and VT SY89841U is part of Micrels high-speed, Precision pin accepts DC-coupled and AC-coupled inputs Edge product line. All support documentation can (CML, PECL, LVDS) be found on Micrels web site at: www.micrel.com. 350mV LVDS output swing 2.5V +5% power supply 40C to +85C industrial temperature range Available in 16-pin (3mm x 3mm) MLF package Applications Redundant clock switchover Fail-safe clock protection Markets LAN/WAN Enterprise servers ATE Test and measurement United States Patent No. RE44,134 Precision Edge is a registered trademark of Micrel, Inc. MicroLeadFrame and MLF are trademarks of Amkor Technology, Inc. February 2005 M9999-021405 hbwhelp micrel.com or (408) 955-1690Micrel, Inc. SY89841U Typical Application Primary Clock Primary Clock From System 2:1 MUX IN0 50 Secondary V 0 T0 Clock 50 /IN0 SEL Select Primary Select Secondary V REF-AC0 MUX IN1 50 OUTPUT V 1S T1 50 Runt pulse eliminated Switchover /IN1 from output occurs Secondary Clock V REF-AC1 From Local Oscillator Simplified Example Illustrating Runt Pulse Eliminator (RPE) Runt Pulse SEL Circuit when Primary Clock Fails (LVTTL/CMOS) Elimination Logic February 2005 2 M9999-021405 hbwhelp micrel.com or (408) 955-1690