TC6215 N- and P-Channel Enhancement-Mode Dual MOSFET Features General Description Back to back gate-source Zener diodes The Supertex TC6215 consists of high voltage, low threshold N-channel Guaranteed R at 4.0V gate drive DS(ON) and P-channel MOSFETs in an 8-Lead SOIC (TG) package. Both Low threshold MOSFETs have integrated back to back gate-source Zener diode clamps Low on-resistance and guaranteed R ratings down to 4.0V gate drive allowing them to DS(ON) Independent N- and P-channels be driven directly with standard 5.0V CMOS logic. Electrically isolated N- and P-channels Low input capacitance These low threshold enhancement-mode (normally-off) transistors utilize Fast switching speeds an advanced vertical DMOS structure and Supertexs well-proven silicon- Free from secondary breakdowns gate manufacturing process. This combination produces devices with the Low input and output leakage power handling capabilities of bipolar transistors and with the high input impedance and positive temperature coefcient inherent in MOS devices. Applications Characteristic of all MOS structures, these devices are free from thermal High voltage pulsers runaway and thermally-induced secondary breakdown. Ampliers Buffers Supertexs vertical DMOS FETs are ideally suited to a wide range of Piezoelectric transducer drivers switching and amplifying applications where very low threshold voltage, General purpose line drivers high breakdown voltage, high input impedance, low input capacitance, Logic level interfaces and fast switching speeds are desired. Ordering Information Package Option BV /BV R (Max) DSS DGS DS(ON) 8-Lead SOIC Device N-Channel P-Channel N-Channel P-Channel 4.90x3.90mm body 1.75mm height (max) (V) (V) () () 1.27mm pitch TC6215 TC6215TG-G 150 -150 4.0 7.0 -G indicates package is RoHS compliant (Green) Absolute Maximum Ratings Pin Conguration DP Parameter Value DP DN Drain-to-source voltage BV DN DSS Drain-to-gate voltage BV GP DGS SP GN Gate-to-source voltage 20V SN 8-Lead SOIC (TG) Operating and storage temperature -55C to + 150C (top view) * Soldering temperature 300C Product Marking Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is not implied. Continuous YY = Year Sealed YYWW operation of the device at the absolute rating level may affect device reliability. All WW = Week Sealed voltages are referenced to device ground. C6215 L = Lot Number * Distance of 1.6mm from case for 10 seconds. L L L L = Green Packaging Package may or may not include the following marks: Si or 8-Lead SOIC (TG) 1235 Bordeaux Drive, Sunnyvale, CA 94089 Tel: 408-222-8888 www.supertex.comTC6215 N-Channel Electrical Characteristics (T = 25C unless otherwise specied) A Sym Parameter Min Typ Max Units Conditions BV Drain-to-source breakdown voltage 150 - - V V = 0V, I = 1.0mA DSS GS D V Gate threshold voltage 1.0 - 2.0 V V = V , I =1.0mA GS(th) GS DS D O V Change in V with temperature - - -4.5 mV/ C V = V , I = 1.0mA GS(th) GS(th) GS DS D VZ Gate-source back to back Zener voltage 14 - 25 V I = 1.0mA GS GS - - 5.0 A V = 0V, V = Max Rating GS DS I Zero gate voltage drain current DSS V = 0.8 Max Rating, DS - - 1.0 mA V = 0V, T = 125C GS A - 2.0 - V = 4.5V, V = 25V GS DS I On-state drain current A D(ON) - 3.8 - V = 10V, V = 25V GS DS - - 4.0 V = 4.0V, I = 0.5A GS D R Static drain-to-source on-state resistance - - 5.0 V = 5.0V, I = 2.0A DS(ON) GS D - - 4.0 V = 10V, I = 2.0A GS D O R Change in R with temperature - - 1.0 %/ C V = 5.0V, I = 2.0A DS(ON) DS(ON) GS D G Forward transconductance 560 - - mmho V = 10V, I = 0.5A FS DS D C Input capacitance - 120 - ISS V = 0V, GS C Common source output capacitance - 33 - pF V = 25V, OSS DS f = 1.0MHz C Reverse transfer capacitance - 11 - RSS t Turn-on delay time - 2.5 - d(ON) V = 25V, t Rise time - 2.3 - DD r ns I = 1.0A, D t Turn-off delay time - 17.2 - d(OFF) R = 25 GEN t Fall time - 11.3 - f V Diode forward voltage drop - - 1.4 V V = 0V, I = 0.5A SD GS SD t Reverse recovery time - 90 - ns V = 0V, I = 0.5A rr GS SD Notes: 1. All DC parameters 100% tested at 25C unless otherwise stated. (Pulsed test: 300s pulse at 2% duty cycle.) 2. All AC parameters sample tested. N-Channel Switching Waveforms and Test Circuit V DD 10V 90% R L Input Pulse OUTPUT Generator 10% 0V t t (ON) (OFF) R GEN D.U.T. t t t t d(ON) r d(OFF) f V DD Input 10% 10% Output 90% 90% 0V 1235 Bordeaux Drive, Sunnyvale, CA 94089 Tel: 408-222-8888 www.supertex.com 2