Supertex inc. TC8220 Two Pair, N- and P-Channel Enhancement-Mode MOSFET Features General Description High voltage Vertical DMOS technology The Supertex TC8220 consists of two pairs of high voltage, low Integrated gate-to-source resistor threshold N-channel and P-channel MOSFETs in a 12-Lead DFN Integrated gate-to-source Zener diode package. All MOSFETs have integrated the gate-to-source resistors Low threshold, Low on-resistance and gate-to-source Zener diode clamps which are desired for high Low input & output capacitance voltage pulser applications. The complimentary, high-speed, high Fast switching speeds voltage, gate-clamped N and P-channel MOSFET pairs utilize an advanced vertical DMOS structure and Supertexs well-proven Electrically isolated N- and P-MOSFET pairs silicon-gate manufacturing process. This combination produces a device with the power handling capabilities of bipolar transistors Applications and with the high input impedance and positive temperature High voltage pulsers coefficient inherent in MOS devices. Amplifiers Buffers Characteristic of all MOS structures, these devices are free from Piezoelectric transducer drivers thermal runaway and thermally induced secondary breakdown. General purpose line drivers Supertexs vertical DMOS FETs are ideally suited to a wide range Logic level interfaces of switching and amplifying applications where very low threshold voltage, high breakdown voltage, high input impedance, low input and output capacitance, and fast switching speeds are desired. Typical Application Circuit V PP +100V +10V 0.47F 0.1F 1.0F VDD VH OE ENAB OUTA INA +PULSE 1.8 to 5.0V OUTB V NN Logic Imputs INB -100V -PULSE OUTC 1.0F INC DAMP OUTD IND GND VSS VL Supertex MD1822 10nF Supertex TC8220 Doc. DSFP-TC8220 Supertex inc. B080713 www.supertex.comTC8220 Ordering Information Product Summary BV /BV R (max) DSS DGS DS(ON) Part Number Package Option Packing N-Channel P-Channel N-Channel P-Channel TC8220K6-G 12-Lead DFN (4x4) 3000/Reel 200V -200V 5.3 6.5 -G denotes a lead (Pb)-free / RoHS compliant package Absolute Maximum Ratings Pin Configuration Parameter Value 1 GN1 12 SN1 Drain-to-source voltage BV DSS GP1 2 11 DN1 Thermal Drain-to-gate voltage BV DGS 3 10 GN2 DP1 Pad Operating and storage temperature -55C to +150C 4 SN2 9 SP1 Absolute Maximum Ratings are those values beyond which damage to GP2 5 8 DN2 the device may occur. Functional operation under these conditions is not 6 7 SP2 DP2 implied. Continuous operation of the device at the absolute rating level may affect device reliability. All voltages are referenced to device ground. 12-Lead DFN (top view) Typical Thermal Resistance Package ja Package Marking O 12-Lead DFN 42 C/W Y = Last Digit of Year Sealed Note: 8220 1.0oz, 4-layer, 3x4 PCB. W = Code for Week Sealed YWLL L = Lot Number = Green Packaging Package may or may not include the following marks: Si or 12-Lead DFN Doc. DSFP-TC8220 Supertex inc. B080713 2 www.supertex.com