Supertex inc. TN0110 N-Channel Enhancement-Mode Vertical DMOS FET Features General Description Low threshold - 2.0V max. This low threshold, enhancement-mode (normally-off) High input impedance transistor utilizes a vertical DMOS structure and Supertexs Low input capacitance - 50pF typical well-proven, silicon-gate manufacturing process. This Fast switching speeds combination produces a device with the power handling Low on-resistance capabilities of bipolar transistors and the high input Free from secondary breakdown impedance and positive temperature coefficient inherent in MOS devices. Characteristic of all MOS structures, this Low input and output leakage device is free from thermal runaway and thermally-induced secondary breakdown. Applications Logic level interfaces ideal for TTL and CMOS Supertexs vertical DMOS FETs are ideally suited to a Solid state relays wide range of switching and amplifying applications where Battery operated systems very low threshold voltage, high breakdown voltage, high Photo voltaic drives input impedance, low input capacitance, and fast switching Analog switches speeds are desired. General purpose line drivers Telecom switches Ordering Information Product Summary R V Part Number Package Option Packing I DS(ON) GS(th) D(ON) BV /BV DSS DGS (min) (max) (max) TN0110N3-G TO-92 1000/Bag 100V 3.0 2.0A 2.0V TN0110N3-G P002 TN0110N3-G P003 TN0110N3-G P005 TO-92 2000/Reel Pin Configuration TN0110N3-G P013 TN0110N3-G P014 -G denotes a lead (Pb)-free / RoHS compliant package. Contact factory for Wafer / Die availablity. DRAIN Devices in Wafer / Die form are lead (Pb)-free / RoHS compliant. SOURCE Absolute Maximum Ratings GATE Parameter Value TO-92 Drain-to-source voltage BV DSS Drain-to-gate voltage BV DGS Product Marking Gate-to-source voltage 20V O O SiTN Operating and storage temperature -55 C to +150 C YY = Year Sealed 0 110 WW = Week Sealed Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is not implied. Continuous operation YYWW = Green Packaging of the device at the absolute rating level may affect device reliability. All voltages are referenced to device ground. Package may or may not include the following marks: Si or TO-92 Typical Thermal Resistance Package ja O TO-92 132 C/W Doc. DSFP-TN0110 Supertex inc. C080813 www.supertex.comTN0110 Thermal Characteristics I I Power Dissipation D D Package I I O DR DRM (continuous) (pulsed) T = 25 C C TO-92 350mA 2.0A 1.0W 350mA 2.0A Notes: I (continuous) is limited by max rated T . D j O Electrical Characteristics (T = 25 C unless otherwise specified) A Sym Parameter Min Typ Max Units Conditions BV Drain-to-source breakdown voltage 100 - - V V = 0V, I = 1.0mA DSS GS D V Gate threshold voltage 0.6 - 2.0 V V = V , I = 0.5mA GS(th) GS DS D O V Change in V with temperature - -3.2 -5.0 mV/ C V = V , I = 1.0mA GS(th) GS(th) GS DS D I Gate body leakage - - 100 nA V = 20V, V = 0V GSS GS DS - - 10 A V = 0V, V = Max Rating GS DS I Zero Gate voltage drain current V = 0V, V = 0.8 Max Rat- DSS GS DS - - 500 A ing, T = 125C A 0.75 1.4 - V = 5.0V, V = 25V GS DS I ON-state drain current A D(ON) 2.0 3.4 - V = 10V, V = 25V GS DS - 2.0 4.5 V = 4.5V, I = 250mA GS D R Static drain-to-source on-state resistance DS(ON) - 1.6 3.0 V = 10V, I = 500mA GS D O R Change in R with temperature - 0.6 1.1 %/ C V = 10V, I = 500mA DS(ON) DS(ON) GS D G Forward transductance 225 400 - mmho V = 25V, I = 500mA FS DS D C Input capacitance - 50 60 ISS V = 0V, GS C Common source output capacitance - 25 35 pF V = 25V, OSS DS f = 1.0MHz C Reverse transfer capacitance - 4.0 8.0 RSS t Turn-on delay time - 2.0 5.0 d(ON) V = 25V, DD t Rise time - 3.0 5.0 r I = 1.0A, ns D t Turn-off delay time - 6.0 7.0 d(OFF) R = 25 GEN t Fall time - 3.0 6.0 f V Diode forward voltage drop 1.0 1.5 V V = 0V, I = 500mA SD GS SD t Reverse recovery time - 400 - ns V = 0V, I = 500mA rr GS SD Notes: O 1. All D.C. parameters 100% tested at 25 C unless otherwise stated. (Pulse test: 300s pulse, 2% duty cycle.) 2. All A.C. parameters sample tested. Switching Waveforms and Test Circuit 10V 90% VDD INPUT Pulse R L 10% Generator 0V OUTPUT t t (ON) (OFF) R GEN t t t t r d(OFF) f d(ON) VDD INPUT D.U.T. 10% 10% OUTPUT 0V 90% 90% Doc. DSFP-TN0110 Supertex inc. C080813 2 www.supertex.com