Supertex inc. TN0604 N-Channel Enhancement-Mode Vertical DMOS FET Features General Description Low threshold (1.6V max.) This low threshold, enhancement-mode (normally-off) transistor utilizes a vertical DMOS structure and Supertexs High input impedance well-proven, silicon-gate manufacturing process. This Low input capacitance (140pF typical) combination produces a device with the power handling Fast switching speeds capabilities of bipolar transistors and the high input impedance Low on-resistance and positive temperature coefficient inherent in MOS devices. Free from secondary breakdown Characteristic of all MOS structures, this device is free Low input and output leakage from thermal runaway and thermally-induced secondary breakdown. Applications Supertexs vertical DMOS FETs are ideally suited to a wide Logic level interfaces - ideal for TTL and CMOS range of switching and amplifying applications where very Solid state relays low threshold voltage, high breakdown voltage, high input Battery operated systems impedance, low input capacitance, and fast switching speeds Photo voltaic drives are desired. Analog switches General purpose line drivers Telecom switches Ordering Information Product Summary Part Number Package Option Packing R I V DS(ON) D(ON) GS(th) BV /BV DSS DGS (max) (max) (min) TN0604N3-G TO-92 1000/Bag 40V 0.75 4.0A 1.6V TN0604N3-G P002 TN0604N3-G P003 Pin Configuration TN0604N3-G P005 TO-92 2000/Reel TN0604N3-G P013 TN0604N3-G P014 DRAIN -G denotes a lead (Pb)-free / RoHS compliant package. SOURCE Contact factory for Wafer / Die availablity. Devices in Wafer / Die form are lead (Pb)-free / RoHS compliant. GATE TO-92 Absolute Maximum Ratings Parameter Value Product Marking Drain-to-source voltage BV DSS SiTN YY = Year Sealed Drain-to-gate voltage BV 0 604 DGS WW = Week Sealed YYWW Gate-to-source voltage 20V = Green Packaging O O Operating and storage temperature -55 C to +150 C Package may or may not include the following marks: Si or Absolute Maximum Ratings are those values beyond which damage to the device TO-92 may occur. Functional operation under these conditions is not implied. Continuous operation of the device at the absolute rating level may affect device reliability. All voltages are referenced to device ground. Typical Thermal Resistance Package ja O TO-92 132 C/W Doc. DSFP-TN0604 Supertex inc. D080813 www.supertex.comTN0604 Thermal Characteristics I I Power Dissipation D D Package I I O DR DRM (continuous) (pulsed) T = 25 C A TO-92 0.7A 4.6A 0.74W 0.7A 4.6A Notes: I (continuous) is limited by max rated T . D j O Electrical Characteristics (T = 25 C unless otherwise specified) A Sym Parameter Min Typ Max Units Conditions BV Drain-to-source breakdown voltage 40 - - V V = 0V, I = 2.0mA DSS GS D V Gate threshold voltage 0.6 - 1.6 V V = V , I = 1.0mA GS(th) GS DS D O V Change in V with temperature - -3.8 -4.5 mV/ C V = V , I = 1.0mA GS(th) GS(th) GS DS D I Gate body leakage - - 100 nA V = 20V, V = 0V GSS GS DS - - 10 A V = 0V, V = Max Rating GS DS I Zero gate voltage drain current V = 0.8 Max Rating, DSS DS - - 1.0 mA V = 0V, T = 125C GS A 1.5 2.1 - V = 5.0V, V = 20V GS DS I On-state drain current A D(ON) 4.0 7.0 - V = 10V, V = 20V GS DS - 1.0 1.6 V = 5.0V, I = 0.75A GS D R Static drain-to-source on-state resistance DS(ON) - 0.6 0.75 V = 10V, I = 1.5A GS D O R Change in R with temperature - 0.5 0.75 %/ C V = 10V, I = 1.5A DS(ON) DS(ON) GS D G Forward transductance 500 800 - mmho V = 20V, I = 1.5A FS DS D C Input capacitance - 140 190 ISS V = 0V, GS C Common source output capacitance - 75 110 pF V = 20V, OSS DS f = 1.0MHz C Reverse transfer capacitance - 25 50 RSS t Turn-on delay time - - 10 d(ON) V = 20V, DD t Rise time - - 6.0 r I = 0.5A, ns D t Turn-off delay time - - 25 d(OFF) R = 25 GEN t Fall time - - 20 f V Diode forward voltage drop - 1.2 1.8 V V = 0V, I = 1.5A SD GS SD t Reverse recovery time - 300 - ns V = 0V, I = 1.0A rr GS SD Notes: O 1. All D.C. parameters 100% tested at 25 C unless otherwise stated. (Pulse test: 300s pulse, 2% duty cycle.) 2. All A.C. parameters sample tested. Switching Waveforms and Test Circuit 10V VDD 90% INPUT Pulse R L 10% Generator 0V OUTPUT t t (ON) (OFF) R GEN t t t t d(ON) r d(OFF) f VDD INPUT D.U.T. 10% 10% OUTPUT 0V 90% 90% Doc. DSFP-TN0604 Supertex inc. D080813 www.supertex.com 2