Supertex inc. TN0702 N-Channel Enhancement-Mode Vertical DMOS FET Features General Description This low threshold, enhancement-mode (normally-off) Low threshold - 1.6V max. transistor utilizes a vertical DMOS structure and Supertexs High input impedance well-proven, silicon-gate manufacturing process. This Low input capacitance - 130pF typical combination produces a device with the power handling Fast switching speeds capabilities of bipolar transistors and the high input impedance Low on-resistance guaranteed at V = 2, 3, and 5V GS and positive temperature coefficient inherent in MOS devices. Free from secondary breakdown Characteristic of all MOS structures, this device is free Low input and output leakage from thermal runaway and thermally-induced secondary breakdown. Applications Logic level interfaces ideal for TTL and CMOS Supertexs vertical DMOS FETs are ideally suited to a wide Solid state relays range of switching and amplifying applications where very Battery operated systems low threshold voltage, high breakdown voltage, high input Photo voltaic drives impedance, low input capacitance, and fast switching speeds Analog switches are desired. General purpose line drivers Telecom switches Ordering Information Product Summary Part Number Package Option Packing R I V DS(ON) D(ON) GS(th) BV /BV DSS DGS (max) (max) (min) TN0702N3-G TO-92 1000/Bag 20V 1.3 0.5A 1.0V TN0702N3-G P002 TN0702N3-G P003 Pin Configuration TN0702N3-G P005 TO-92 2000/Reel TN0702N3-G P013 TN0702N3-G P014 -G denotes a lead (Pb)-free / RoHS compliant package. Contact factory for Wafer / Die availablity. DRAIN Devices in Wafer / Die form are lead (Pb)-free / RoHS compliant. SOURCE Absolute Maximum Ratings GATE Parameter Value TO-92 Drain-to-source voltage BV DSS Drain-to-gate voltage BV DGS Product Marking Gate-to-source voltage 20V O O Operating and storage temperature -55 C to +150 C SiTN YY = Year Sealed 0 702 Absolute Maximum Ratings are those values beyond which damage to the device WW = Week Sealed may occur. Functional operation under these conditions is not implied. Continuous YYWW = Green Packaging operation of the device at the absolute rating level may affect device reliability. All voltages are referenced to device ground. Package may or may not include the following marks: Si or TO-92 Typical Thermal Resistance Package ja O TO-92 132 C/W Doc. DSFP-TN0702 Supertex inc. C080813 www.supertex.comTN0702 Thermal Characteristics I I Power Dissipation D D Package I I O DR DRM (continuous) (pulsed) T = 25 C C TO-92 530mA 1.0A 1.0W 530mA 1.0A Notes: I (continuous) is limited by max rated T . D j O Electrical Characteristics (T = 25 C unless otherwise specified) A Sym Parameter Min Typ Max Units Conditions BV Drain-to-source breakdown voltage 20 - - V V = 0V, I = 1.0mA DSS GS D V Gate threshold voltage 0.5 0.8 1.0 V V = V , I = 1.0mA GS(th) GS DS D O V Change in V with temperature - - -4.0 mV/ C V = V , I = 1.0mA GS(th) GS(th) GS DS D I Gate body leakage - - 100 nA V = 20V, V = 0V GSS GS DS - - 100 nA V = 0V, V = Max Rating GS DS I Zero gate voltage drain current V = 0.8 Max Rating, DSS DS - - 100 A V = 0V, T = 125C GS A I On-state drain current 0.5 1.0 - A V = V = 5.0V D(ON) GS DS - 4.0 5.0 V = 2.0V, I = 50mA GS D R Static drain-to-source on-state resistance - 1.9 2.5 V = 3.0V, I = 200mA DS(ON) GS D - 1.0 1.3 V = 5.0V, I = 500mA GS D O R Change in R with temperature - - 0.75 %/ C V = 5.0V, I = 500mA DS(ON) DS(ON) GS D G Forward transductance 100 500 - mmho V = 5.0V, I = 500mA FS DS D C Input capacitance - 130 200 ISS V = 0V, GS C Common source output capacitance - 70 125 pF V = 20V, OSS DS f = 1.0MHz C Reverse transfer capacitance - 30 60 RSS t Turn-on delay time - - 20 d(ON) V = 20V, DD t Rise time - - 20 r ns I = 0.5A, D t Turn-off delay time - - 30 d(OFF) R = 25 GEN t Fall time - - 20 f V Diode forward voltage drop - - 1.0 V V = 0V, I = 0.5A SD GS SD Notes: O 1. All D.C. parameters 100% tested at 25 C unless otherwise stated. (Pulse test: 300s pulse, 2% duty cycle.) 2. All A.C. parameters sample tested. Switching Waveforms and Test Circuit 10V VDD 90% INPUT Pulse R L 10% Generator 0V OUTPUT t t (ON) (OFF) R GEN t t t t d(OFF) f d(ON) r VDD INPUT D.U.T. 10% 10% OUTPUT 0V 90% 90% Doc. DSFP-TN0702 Supertex inc. C080813 2 www.supertex.com