TP2510 P-Channel Enhancement Mode Vertical DMOS FETs Features General Description Low threshold (-2.4V max.) This low threshold enhancement-mode (normally-off) tran- High input impedance sistor utilizes a vertical DMOS structure and Supertexs well- Low input capacitance (125pF max.) proven silicon-gate manufacturing process. This combination Fast switching speeds produces a device with the power handling capabilities of Low on-resistance bipolar transistors and with the high input impedance and Free from secondary breakdown positive temperature coefcient inherent in MOS devices. Low input and output leakage Characteristic of all MOS structures, this device is free from thermal runaway and thermally-induced secondary breakdown. Applications Logic level interfaces - ideal for TTL and CMOS Supertexs vertical DMOS FETs are ideally suited to a wide Solid state relays range of switching and amplifying applications where very Battery operated systems low threshold voltage, high breakdown voltage, high input Photo voltaic drives impedance, low input capacitance, and fast switching Analog switches speeds are desired. General purpose line drivers Telecom switches Ordering Information V I Package Options GS(TH) D(ON) BV /BV R DSS DGS DS(ON) Device (max) (min) (V) () TO-243AA (SOT-89) Die* (V) (A) TP2510 TP2510N8-G TP2510ND -100 3.5 -2.4 -1.5 -G indicates package is RoHS compliant (Green) * MIL visual screening available. Pin Conguration DRAIN SOURCE DRAIN Absolute Maximum Ratings GATE TO-243AA (SOT-89) (N8) Parameter Value Drain-to-source voltage BV DSS Product Marking Drain-to-gate voltage BV DGS Gate-to-source voltage 20V W = Code for Week Sealed TP5AW = Green Packaging Operating and storage temperature -55C to +150C Package may or may not include the following marks: Si or Soldering temperature* 300C Absolute Maximum Ratings are those values beyond which damage to the device may TO-243AA (SOT-89) (N8) occur. Functional operation under these conditions is not implied. Continuous operation of the device at the absolute rating level may affect device reliability. All voltages are referenced to device ground. * Distance of 1.6 mm from case for 10 seconds. 1235 Bordeaux Drive, Sunnyvale, CA 94089 Tel: 408-222-8888 www.supertex.comTP2510 Thermal Characteristics Power Dissipation I I D D I I DRM O jc ja DR Package T = 25 C (continuous) (pulsed) A O O (A) ( C/W) ( C/W) (mA) (mA) (A) (W) TO-243AA -480 -2.5 1.6 15 78 -480 -2.5 I (continuous) is limited by max rated T. D j Mounted on FR5 board, 25mm x 25mm x 1.57mm. Electrical Characteristics (T = 25C unless otherwise specied ) A Sym Parameter Min Typ Max Units Conditions BV Drain-to-source breakdown voltage -100 - - V V = 0V, I = -2.0mA DSS GS D V Gate threshold voltage -1.0 - -2.4 V V = V , I = -1.0mA GS(th) GS DS D O V Change in V with temperature - - 5.0 mV/ C V = V , I = -1.0mA GS(th) GS(th) GS DS D I Gate body leakage - - -100 nA V = 20V, V = 0V GSS GS DS - -10 A V = 0V, V = Max Rating GS DS I Zero gate voltage drain current - DSS V = 0.8 Max Rating, DS - -1.0 mA V = 0V, T = 125C GS A -0.4 -0.6 - V = -5.0V, V = -25V GS DS I On-state drain current A D(ON) -1.5 -2.5 - V = -10V, V = -25V GS DS 5.0 7.0 V = -5.0V, I = -250mA GS D R Static drain-to-source on-state resistance - DS(ON) 2.0 3.5 V = -10V, I = -750mA GS D O R Change in R with temperature - - 1.7 %/ C V = -10V, I = -750mA DS(ON) DS(ON) GS D G Forward transconductance 300 360 - mmho V = -25V, I = -750mA FS DS D C Input capacitance - 80 125 V = 0V, ISS GS C Common source output capacitance - 40 70 pF V = -25V, OSS DS f = 1.0 MHz C Reverse transfer capacitance - 10 25 RSS t Turn-on delay time - - 10 d(ON) V = -25V, DD t Rise time - - 15 r ns I = -1.0A, D t Turn-off delay time - - 20 d(OFF) R = 25 GEN t Fall time - - 15 f V Diode forward voltage drop - - -1.8 V V = 0V, I = -1.0A SD GS SD t Reverse recovery time - 300 - ns V = 0V, I = -1.0A rr GS SD Notes: 1. All D.C. parameters 100% tested at 25C unless otherwise stated. (Pulse test: 300s pulse, 2% duty cycle.) 2. All A.C. parameters sample tested. Switching Waveforms and Test Circuit 0V PULS E 10% GENERATOR INPUT R -10V 90% GEN t t (ON) (OFF) D.U.T. t t t t d(ON) r d(OFF) F Outpu t 0V INPU T 90% 90% R L OUTPUT 10% 10% V V DD DD 1235 Bordeaux Drive, Sunnyvale, CA 94089 Tel: 408-222-8888 www.supertex.com 2