M25P20-VMP6G Micron

M25P20 2 Mbit, low voltage, Serial Flash memory with 50MHz SPI bus interface Feature summary 2 Mbit of Flash Memory Page Program (up to 256 Bytes) in 1.4ms (typical) Sector Erase (512 Kbit) in 1s (typical) SO8 (MN) Bulk Erase (2 Mbit) in 3s (typical) 150 mil width 2.7 to 3.6V Single Supply Voltage SPI Bus Compatible Serial Interface 50MHz Clock Rate (maximum) Deep Power-down Mode 1 A (typical) Electronic Signatures JEDEC Standard two-Byte Signature (2012h) VFQFPN8 (MP) RES Instruction, One-Byte, Signature (MLP8) (11h), for backward compatibility Packages ECOPACK (RoHS compliant) June 2006 Rev 10 1/50 www.st.com 1Contents M25P20 Contents 1 Summary description 6 2 Signal description . 8 2.1 Serial Data Output (Q) 8 2.2 Serial Data Input (D) . 8 2.3 Serial Clock (C) . 8 2.4 Chip Select (S) 8 2.5 Hold (HOLD) 8 2.6 Write Protect (W) 8 3 SPI modes . 9 4 Operating features . 11 4.1 Page Programming 11 4.2 Sector Erase and Bulk Erase 11 4.3 Polling During a Write, Program or Erase Cycle . 11 4.4 Active Power, Standby Power and Deep Power-Down Modes . 11 4.5 Status Register . 12 4.6 Protection Modes . 12 4.7 Hold Condition . 13 5 Memory organization . 15 6 Instructions . 16 6.1 Write Enable (WREN) . 17 6.2 Write Disable (WRDI) 18 6.3 Read Identification (RDID) 19 6.4 Read Status Register (RDSR) . 20 6.4.1 WIP bit 20 6.4.2 WEL bit . 20 6.4.3 BP1, BP0 bits . 20 6.4.4 SRWD bit 20 6.5 Write Status Register (WRSR) . 22 2/50