MT41K128M8DA-107 IT:J TR Micron

1Gb: x4, x8, x16 DDR3L SDRAM Description DDR3L SDRAM MT41K256M4 32 Meg x 4 x 8 banks MT41K128M8 16 Meg x 8 x 8 banks MT41K64M16 8 Meg x 16 x 8 banks Write leveling Description Multipurpose register The 1.35V DDR3L SDRAM device is a low-voltage ver- Output driver calibration sion of the 1.5V DDR3 SDRAM device. Refer to the DDR3 (1.5V) SDRAM data sheet specifications when 1 Options Marking running in 1.5V compatible mode. Configuration 256 Meg x 4 256M4 Features 128 Meg x 8 128M8 V = V = +1.35V (1.283V to 1.45V) DD DDQ 64 Meg x 16 64M16 Backward compatible to V = V = 1.5V 0.075V DD DDQ FBGA package (Pb-free) x4, x8 Differential bidirectional data strobe 78-ball FBGA (8mm x 11.5mm) Rev. JP 8n-bit prefetch architecture G Differential clock inputs (CK, CK ) 78-ball FBGA (8mm x 10.5mm) Rev. J DA 8 internal banks FBGA package (Pb-free) x16 Nominal and dynamic on-die termination (ODT) 96-ball FBGA (8mm x 14mm) Rev. G JT for data, strobe, and mask signals 96-ball FBGA (8mm x 14mm) Rev. J TW Programmable CAS (READ) latency (CL) Timing cycle time Programmable CAS additive latency (AL) 1.07ns CL = 13 (DDR3-1866) -107 Programmable CAS (WRITE) latency (CWL) 1.25ns CL = 11 (DDR3-1600) -125 Fixed burst length (BL) of 8 and burst chop (BC) of 4 1.5ns CL = 9 (DDR3-1333) -15E (via the mode register set MRS ) 1.87ns CL = 7 (DDR3-1066) -187E Selectable BC4 or BL8 on-the-fly (OTF) Operating temperature Self refresh mode Commercial (0C T +95C) None C T of 95C C Industrial (40C T +95C) IT C 64ms, 8192-cycle refresh up to 85C Revision :G / :J 32ms, 8192-cycle refresh at >85C to 95C Self refresh temperature (SRT) 1. Not all options listed can be combined to Note: Automatic self refresh (ASR) define an offered product. Use the part catalog search on 1Gb: x4, x8, x16 DDR3L SDRAM Description Table 2: Addressing Parameter 256 Meg x 4 128 Meg x 8 64 Meg x 16 Configuration 32 Meg x 4 x 8 banks 16 Meg x 8 x 8 banks 8 Meg x 16 x 8 banks Refresh count 8K 8K 8K Row address 16K A 13:0 16K A 13:0 8K A 12:0 Bank address 8 BA 2:0 8 BA 2:0 8 BA 2:0 Column address 2K A 11, 9:0 1K A 9:0 1K A 9:0 Page Size 1KB 1KB 2KB Figure 1: DDR3 Part Numbers Example Part Number: MT41K256M4DA-125:J - : MT41K Configuration Package Speed Revision :G / :J Revision Temperature Configuration Commercial 256 Meg x 4 256M4 None Industrial temperature 128 Meg x 8 128M8 IT 64 Meg x 16 64M16 Package Rev. Mark Speed Grade t 78-ball 8mm x 11.5mm FBGA G JP -107 CK = 1.07ns, CL = 13 t 96-ball 8mm x 14mm FBGA -125 G JT CK = 1.25ns, CL = 11 78-ball 8mm x 10.5mm FBGA -15E t J DA CK = 1.5ns, CL = 9 t 96-ball 8mm x 14mm FBGA -187E J TW CK = 1.87ns, CL = 7 Note: 1. Not all options listed can be combined to define an offered product. Use the part catalog search on