512Mb: x4, x8, x16 DDR2 SDRAM Features DDR2 SDRAM MT47H128M4 32 Meg x 4 x 4 banks MT47H64M8 16 Meg x 8 x 4 banks MT47H32M16 8 Meg x 16 x 4 banks 1 Options Marking Features Configuration V = 1.8V 0.1V, V = 1.8V 0.1V DD DDQ 128 Meg x 4 (32 Meg x 4 x 4 banks) 128M4 JEDEC-standard 1.8V I/O (SSTL 18-compatible) 64 Meg x 8 (16 Meg x 8 x 4 banks) 64M8 Differential data strobe (DQS, DQS ) option 32 Meg x 16 (8 Meg x 16 x 4 banks) 32M16 FBGA package (Pb-free) x16 4n-bit prefetch architecture 84-ball FBGA (8mm x 12.5mm) Rev. G HR Duplicate output strobe (RDQS) option for x8 84-ball FBGA (8mm x 12.5mm) Rev. H NF DLL to align DQ and DQS transitions with CK FBGA package (Pb-free) x4, x8 4 internal banks for concurrent operation 60-ball FBGA (8mm x 10mm) Rev. G CF Programmable CAS latency (CL) 60-ball FBGA (8mm x 10mm) Rev. H SH Posted CAS additive latency (AL) FBGA package (lead solder) x16 t 84-ball FBGA (8mm x 12.5mm) Rev. G HW WRITE latency = READ latency - 1 CK FBGA package (lead solder) x4, x8 Selectable burst lengths: 4 or 8 60-ball FBGA (8mm x 10mm) Rev. G JN Adjustable data-output drive strength Timing cycle time 64ms, 8192-cycle refresh 1.875ns CL = 7 (DDR2-1066) -187E On-die termination (ODT) 2.5ns CL = 5 (DDR2-800) -25E Industrial temperature (IT) option 3.0ns CL = 5 (DDR2-667) -3 Self refresh RoHS-compliant Standard None Supports JEDEC clock jitter specification Low-power L Operating temperature 2 Commercial (0C T +85C) None C Industrial (40C T +95C IT C 40C T +85C) A Revision :G/:H 1. Not all options listed can be combined to Notes: define an offered product. Use the Part Catalog Search on www.micron.com for product offerings and availability. 2. For extended CT operating temperature, see Table 11 (page 30), Note 7. Table 1: Key Timing Parameters Data Rate (MT/s) t Speed Grade CL = 3 CL = 4 CL = 5 CL = 6 CL = 7 RC (ns) -187E 400 533 800 800 1066 54 -25E 400 533 800 800 n/a 55 -3 400 533 667 n/a n/a 55 CCMTD-1725822587-9657 Micron Technology, Inc. reserves the right to change products or specifications without notice. 1 512MbDDR2.pdf - Rev. Z 09/18 EN 2004 Micron Technology, Inc. All rights reserved. Products and specifications discussed herein are subject to change by Micron without notice.512Mb: x4, x8, x16 DDR2 SDRAM Features Table 2: Addressing Parameter 128 Meg x 4 64 Meg x 8 32 Meg x 16 Configuration 32 Meg x 4 x 4 banks 16 Meg x 8 x 4 banks 8 Meg x 16 x 4 banks Refresh count 8K 8K 8K Row address A 13:0 (16K) A 13:0 (16K) A 12:0 (8K) Bank address BA 1:0 (4) BA 1:0 (4) BA 1:0 (4) Column address A 11, 9:0 (2K) A 9:0 (1K) A 9:0 (1K) Figure 1: 512Mb DDR2 Part Numbers Example Part Number: MT47H128M4SH-25E:H - : MT47H Configuration Package Speed Revision :G/:H Revision Configuration 128 Meg x 4 128M4 64 Meg x 8 64M8 L Low power 32 Meg x 16 32M16 IT Industrial temperature Package Pb-free Speed Grade t 84-ball 8mm x 12.5mm FBGA HR CK = 3ns, CL = 5 -3 60-ball 8mm x 10.0mm FBGA CF t CK = 2.5ns, CL = 5 -25E NF 84-ball 8mm x 12.5mm FBGA t -187E CK = 1.875ns, CL = 7 60-ball 8mm x 10.0mm FBGA SH Lead solder 84-ball 8mm x 12.5mm FBGA HW 60-ball 8mm x 10mm FBGA JN 1. Not all speeds and configurations are available in all packages. Note: FBGA Part Number System Due to space limitations, FBGA-packaged components have an abbreviated part marking that is different from the part number. For a quick conversion of an FBGA code, see the FBGA Part Marking Decoder on Microns Web site: