74AHCT2G08DP,125 Nexperia

74AHC2G08 74AHCT2G08 Dual 2-input AND gate Rev. 6 21 March 2018 Product data sheet 1 General description The 74AHC2G08 74AHCT2G08 is a high-speed Si-gate CMOS device. The 74AHC2G08 74AHCT2G08 provides two 2-input AND gates. 2 Features and benefits Symmetrical output impedance High noise immunity ESD protection: HBM JESD22-A114E exceeds 2000 V MM JESD22-A115-A exceeds 200 V CDM JESD22-C101C exceeds 1000 V Low power dissipation Balanced propagation delays Multiple package options Specified from -40 C to +80 C and from -40 C to +125 C 3 Ordering information Table 1.Ordering information Type number Package Temperature range Name Description Version 74AHC2G08DP -40 C to +125 C TSSOP8 plastic thin shrink small outline package 8 leads SOT505-2 body width 3 mm lead length 0.5 mm 74AHCT2G08DP 74AHC2G08DC -40 C to +125 C VSSOP8 plastic very thin shrink small outline package 8 leads SOT765-1 body width 2.3 mm 74AHCT2G08DCNexperia 74AHC2G08 74AHCT2G08 Dual 2-input AND gate 4 Marking Table 2.Marking 1 Type number Marking code 74AHC2G08DP A08 74AHCT2G08DP C08 74AHC2G08DC A08 74AHCT2G08DC C08 1 The pin 1 indicator is located on the lower left corner of the device, below the marking code. 5 Functional diagram 1 & 7 2 1 1A 1Y 7 2 1B 5 2A 5 & 2Y 3 3 6 2B 6 mna724 mna725 Figure 1. Logic symbol Figure 2. IEC logic symbol A Y B mna221 Figure 3. Logic diagram (one gate) 74AHC AHCT2G08 All information provided in this document is subject to legal disclaimers. Nexperia B.V. 2018. All rights reserved. Product data sheet Rev. 6 21 March 2018 2 / 14