74ALVC04PW,118 Nexperia

74ALVC04 Hex inverter Rev. 4 30 April 2021 Product data sheet 1. General description The 74ALVC04 is a hex inverter. This device is fully specified for partial power down applications using I . The I circuitry disables the output, preventing the potentially damaging backflow OFF OFF current through the device when it is powered down. Schmitt-trigger action at all inputs makes the circuit tolerant for slower input rise and fall times. 2. Features and benefits Wide supply voltage range from 1.65 V to 3.6 V 3.6 V tolerant inputs/outputs CMOS low power consumption Direct interface with TTL levels (2.7 V to 3.6 V) Power-down mode Latch-up performance exceeds 250 mA Complies with JEDEC standards: JESD8-7 (1.65 V to 1.95 V) JESD8-5 (2.3 V to 2.7 V) JESD8B (2.7 V to 3.6 V) ESD protection: MM JESD22-A115-A exceeds 200 V HBM JESD22-A114E exceeds 2000 V Multiple package options Specified from -40 C to +85 CNexperia 74ALVC04 Hex inverter 3. Ordering information Table 1. Ordering information Type number Package Temperature range Name Description Version 74ALVC04D -40 C to +85 C SO14 plastic small outline package 14 leads SOT108-1 body width 3.9 mm 74ALVC04PW -40 C to +85 C TSSOP14 plastic thin shrink small outline package 14 leads SOT402-1 body width 4.4 mm 74ALVC04BQ -40 C to +85 C DHVQFN14 plastic dual in-line compatible thermal enhanced SOT762-1 very thin quad flat package no leads 14 terminals body 2.5 3 0.85 mm 4. Functional diagram 1 1 2 1 1A 1Y 2 1 3 4 2Y 3 2A 4 1 5 6 3A 3Y 6 5 1 9 8 9 4A 4Y 8 1 11 5A 5Y 10 11 10 13 6A 6Y 12 1 13 12 Y A mna342 mna343 mna341 Fig. 1. Logic symbol Fig. 2. IEC logic symbol Fig. 3. Logic diagram (one inverter) 74ALVC04 All information provided in this document is subject to legal disclaimers. Nexperia B.V. 2021. All rights reserved Product data sheet Rev. 4 30 April 2021 2 / 13