74AUP1Z04GW-Q100H Nexperia

74AUP1Z04-Q100 Low-power X-tal driver with enable and internal resistor Rev. 1 18 August 2020 Product data sheet 1. General description The 74AUP1Z04-Q100 is a crystal driver with enable and internal resistor. When not in use the EN input can be driven HIGH, putting the device in a low power disable mode with X1 pulled HIGH via R , X2 set LOW and Y set HIGH. Schmitt trigger action on the EN input makes the circuit tolerant PU to slower input rise and fall times across the entire V range from 0.8 V to 3.6 V. Schmitt-trigger CC action at all inputs makes the circuit tolerant of slower input rise and fall times. This product has been qualified to the Automotive Electronics Council (AEC) standard Q100 (Grade 1) and is suitable for use in automotive applications. 2. Features and benefits Automotive product qualification in accordance with AEC-Q100 (Grade 1) Specified from -40 C to +85 C and from -40 C to +125 C Wide supply voltage range from 0.8 V to 3.6 V CMOS low power dissipation High noise immunity Overvoltage tolerant inputs to 3.6 V Low noise overshoot and undershoot < 10 % of V CC I circuitry provides partial Power-down mode operation at output Y OFF Latch-up performance exceeds 100 mA per JESD78B Class II Complies with JEDEC standards: JESD8-12 (0.8 V to 1.3 V) JESD8-11 (0.9 V to 1.65 V) JESD8-7 (1.65 V to 1.95 V) JESD8-5 (2.3 V to 2.7 V) JESD8C (2.7 V to 3.6 V) ESD protection: HBM JESD22-A114F Class 3A exceeds 5000 V MM JESD22-A115-A exceeds 200 V CDM JESD22-C101E exceeds 1000 V 3. Ordering information Table 1. Ordering information Type number Package Temperature range Name Description Version 74AUP1Z04GW-Q100 -40 C to +125 C SC-88 plastic surface-mounted package 6 leads SOT363Nexperia 74AUP1Z04-Q100 Low-power X-tal driver with enable and internal resistor 4. Marking Table 2. Marking Type number Marking code 1 74AUP1Z04GW-Q100 a4 1 The pin 1 indicator is located on the lower left corner of the device, below the marking code. 5. Functional diagram V CC R PU 3 6 X1 Y R bias 4 X2 1 EN 001aae488 R = pull-up resistance. PU R = bias resistance. bias Fig. 1. Logic symbol 6. Pinning information 6.1. Pinning 74AUP1Z04 EN 1 6 Y 2 5 GND V CC 3 4 X1 X2 001aad592 Fig. 2. Pin configuration SOT363 (SC-88) 74AUP1Z04 Q100 All information provided in this document is subject to legal disclaimers. Nexperia B.V. 2020. All rights reserved Product data sheet Rev. 1 18 August 2020 2 / 21