74AVCH16245DGG,118 Nexperia

74AVCH16245 16-bit transceiver with direction pin 3.6 V tolerant 3-state Rev. 3 8 January 2013 Product data sheet 1. General description The 74AVCH16245 is a 16-bit transceiver featuring non-inverting 3-state bus compatible outputs in both send and receive directions. The device features two output enable inputs (nOE) for easy cascading and two send/receive inputs (nDIR) for direction control. Inputs nOE control the outputs so that the buses are effectively isolated. This device can be used as two 8-bit transceivers or one 16-bit transceiver. The 74AVCH16245 is designed to have an extremely fast propagation delay and a minimum amount of power consumption. To ensure the high-impedance output state during power-up or power-down, tie pins nOE to V through a pull-up resistor (Live Insertion). CC A Dynamic Controlled Output (DCO) circuitry is implemented to support termination line drive during transient (see Figure 4 and Figure 5) The 74AVCH16245 has active bus-hold circuitry to hold unused or floating data inputs at a valid logic level. This feature eliminates the need for external pull-up or pull-down resistors. 2. Features and benefits Wide supply voltage range from 1.2 V to 3.6 V Complies with JEDEC standards: JESD8-7 (1.2 V to 1.95 V) JESD8-5 (1.8 V to 2.7 V) JESD8-1A (2.7 V to 3.6 V) CMOS low power consumption Input/output tolerant up to 3.6 V Dynamic Controlled Output (DCO) circuit dynamically changes output impedance, resulting in noise reduction without speed degradation Low inductance multiple VCC and GND pins to minimize noise and ground bounce Supports Live Insertion All inputs have bus-hold74AVCH16245 Nexperia 16-bit transceiver with direction pin 3.6 V tolerant 3-state 3. Ordering information Table 1. Ordering information Type number Package Temperature range Name Description Version 74AVCH16245DGG 40 C to +85 C TSSOP48 plastic thin shrink small outline package SOT362-1 48 leads body width 6.1 mm 4. Functional diagram 2DIR 1DIR 1OE 2OE 2A0 1A0 1B0 2B0 1A1 2A1 1B1 2B1 1A2 2A2 1B2 2B2 1A3 2A3 1B3 2B3 1A4 2A4 1B4 2B4 1A5 2A5 1B5 2B5 1A6 2A6 1B6 2B6 1A7 2A7 1B7 2B7 001aaa789 Fig 1. Logic symbol 74AVCH16245 All information provided in this document is subject to legal disclaimers. Nexperia B.V. 2017. All rights reserved Product data sheet Rev. 3 8 January 2013 2 of 16