74AVCH16T245DGG,18 Nexperia

74AVCH16T245 16-bit dual supply translating transceiver with configurable voltage translation 3-state Rev. 6 3 April 2019 Product data sheet 1. General description The 74AVCH16T245 is a 16-bit transceiver with bidirectional level voltage translation and 3-state outputs. The device can be used as two 8-bit transceivers or as a 16-bit transceiver. It has dual supplies (V and V ) for voltage translation and four 8-bit input-output ports (nAn, nBn) CC(A) CC(B) each with its own output enable (nOE) and send/receive (nDIR) input for direction control. V CC(A) and V can be independently supplied at any voltage between 0.8 V and 3.6 V making the CC(B) device suitable for low voltage translation between any of the following voltages: 0.8 V, 1.2 V, 1.5 V, 1.8 V, 2.5 V and 3.3 V. A HIGH on nDIR selects transmission from nAn to nBn while a LOW on nDIR selects transmission from nBn to nAn. A HIGH on nOE causes the outputs to assume a high-impedance OFF-state The device is fully specified for partial power-down applications using I . The I circuitry OFF OFF disables the output, preventing any damaging backflow current through the device when it is powered down. In suspend mode when either V or V are at GND level, both A and B CC(A) CC(B) outputs are in the high-impedance OFF-state. The bus-hold circuitry on the powered-up side always stays active. The 74AVCH16T245 has active bus hold circuitry which is provided to hold unused or floating data inputs at a valid logic level. This feature eliminates the need for external pull-up or pull-down resistors. 2. Features and benefits Wide supply voltage range: V : 0.8 V to 3.6 V and V : 0.8 V to 3.6 V CC(A) CC(B) Complies with JEDEC standards: JESD8-12 (0.8 V to 1.3 V) JESD8-11 (0.9 V to 1.65 V) JESD8-7 (1.2 V to 1.95 V) JESD8-5 (1.8 V to 2.7 V) JESD8-B (2.7 V to 3.6 V) ESD protection: HBM JESD22-A114F Class 3B exceeds 8000 V MM JESD22-A115-A exceeds 200 V CDM JESD22-C101D exceeds 1000 V Maximum data rates: 380 Mbit/s ( 1.8 V to 3.3 V translation) 200 Mbit/s ( 1.1 V to 3.3 V translation) 200 Mbit/s ( 1.1 V to 2.5 V translation) 200 Mbit/s ( 1.1 V to 1.8 V translation) 150 Mbit/s ( 1.1 V to 1.5 V translation) 100 Mbit/s ( 1.1 V to 1.2 V translation) Suspend mode Bus hold on data inputs Latch-up performance exceeds 100 mA per JESD 78 Class II Inputs accept voltages up to 3.6 V I circuitry provides partial Power-down mode operation OFF Specified from -40 C to +85 C and -40 C to +125 CNexperia 74AVCH16T245 16-bit dual supply translating transceiver with configurable voltage translation 3-state 3. Ordering information Table 1. Ordering information Type number Package Temperature range Name Description Version 74AVCH16T245DGG -40 C to +125 C TSSOP48 plastic thin shrink small outline package SOT362-1 48 leads body width 6.1 mm 4. Functional diagram 1DIR 2DIR 1OE 2OE 1A1 2A1 1B1 2B1 V V V V CC(A) CC(B) CC(A) CC(B) to other seven channels to other seven channels 001aak426 Fig. 1. Logic diagram 1B1 1B2 1B3 1B4 1B5 1B6 1B7 1B8 V V CC(A) CC(B) 1OE 1DIR 1A1 1A2 1A3 1A4 1A5 1A6 1A7 1A8 2B1 2B2 2B3 2B4 2B5 2B6 2B7 2B8 V V CC(A) CC(B) 2OE 2DIR 2A1 2A2 2A3 2A4 2A5 2A6 2A7 2A8 001aak425 Fig. 2. Logic symbol 74AVCH16T245 All information provided in this document is subject to legal disclaimers. Nexperia B.V. 2019. All rights reserved Product data sheet Rev. 6 3 April 2019 2 / 21