74AXP1G86GXH Nexperia

74AXP1G86 Low-power 2-input EXCLUSIVE-OR gate Rev. 1 13 November 2015 Product data sheet 1. General description The 74AXP1G86 is a single 2-input EXCLUSIVE-OR gate. Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times. This device ensures very low static and dynamic power consumption across the entire V range from 0.7 V to 2.75 V. It is fully specified for partial power down applications CC using I . The I circuitry disables the output, preventing the potentially damaging OFF OFF backflow current through the device when it is powered down. 2. Features and benefits Wide supply voltage range from 0.7 V to 2.75 V Low input capacitance C = 0.5 pF (typical) I Low output capacitance C = 1.0 pF (typical) O Low dynamic power consumption C = 2.6 pF at V = 1.2 V (typical) PD CC Low static power consumption I = 0.6 A (85 C maximum) CC High noise immunity Complies with JEDEC standard: JESD8-12A.01 (1.1 V to 1.3 V) JESD8-11A.01 (1.4 V to 1.6 V) JESD8-7A (1.65 V to 1.95 V) JESD8-5A.01 (2.3 V to 2.7 V) ESD protection: HBM ANSI/ESDA/JEDEC JS-001 Class 2 exceeds 2 kV CDM JESD22-C101E exceeds 1000 V Latch-up performance exceeds 100 mA per JESD 78 Class II Inputs accept voltages up to 2.75 V Low noise overshoot and undershoot < 10 % of V CC I circuitry provides partial Power-down mode operation OFF Multiple package options Specified from 40 Cto+85 C74AXP1G86 Nexperia Low-power 2-input EXCLUSIVE-OR gate 3. Ordering information Table 1. Ordering information Type number Package Temperature range Name Description Version 74AXP1G86GM 40 C to +85 C XSON6 plastic extremely thin small outline package no leads SOT886 6 terminals body 1 1.45 0.5 mm 74AXP1G86GN 40 C to +85 C XSON6 extremely thin small outline package no leads SOT1115 6 terminals body 0.9 1.0 0.35 mm 74AXP1G86GS 40 C to +85 C XSON6 extremely thin small outline package no leads SOT1202 6 terminals body 1.0 1.0 0.35 mm 74AXP1G86GX 40 C to +85 C X2SON5 X2SON5: plastic thermal enhanced extremely thin SOT1226 small outline package no leads 5 terminals body 0.8 0.8 0.35 mm 4. Marking Table 2. Marking 1 Type number Marking code 74AXP1G86GM rH 74AXP1G86GN rH 74AXP1G86GS rH 74AXP1G86GX rH 1 The pin 1 indicator is located on the lower left corner of the device, below the marking code. 5. Functional diagram % < QD P D PQ Fig 1. Logic symbol Fig 2. IEC logic symbol % < PQ D Fig 3. Logic diagram 74AXP1G86 All information provided in this document is subject to legal disclaimers. Nexperia B.V. 2017. All rights reserved Product data sheet Rev. 1 13 November 2015 2 of 17