74HC109D-Q100J Nexperia

74HC109-Q100 74HCT109-Q100 Dual JK flip-flop with set and reset positive-edge-trigger Rev. 2 1 April 2020 Product data sheet 1. General description The 74HC109-Q100 74HCT109-Q100 is a dual positive edge triggered JK flip-flop featuring individual nJ and nK inputs. It has clock (nCP) inputs, set (nSD) and reset (nRD) inputs and complementary nQ and nQ outputs. The set and reset are asynchronous active LOW inputs and operate independently of the clock input. The nJ and nK inputs control the state changes of the flip-flops as described in the mode select function table. The nJ and nK inputs must be stable one set-up time prior to the LOW-to-HIGH clock transition for predictable operation. The JK design allows operation as a D-type flip-flop by connecting the nJ and nK inputs together. Inputs include clamp diodes. It enables the use of current limiting resistors to interface inputs to voltages in excess of V . CC Schmitt-trigger action in the clock input makes the circuit highly tolerant to slower clock rise and fall times. This product has been qualified to the Automotive Electronics Council (AEC) standard Q100 (Grade 1) and is suitable for use in automotive applications. 2. Features and benefits Automotive product qualification in accordance with AEC-Q100 (Grade 1) Specified from -40 C to +85 C and from -40 C to +125 C Input levels: For 74HC109-Q100: CMOS level For 74HCT109-Q100: TTL level J and K inputs for easy D-type flip-flop Toggle flip-flop ordo nothin mode Specified in compliance with JEDEC standard no. 7A ESD protection: MIL-STD-883, method 3015 exceeds 2000 V HBM JESD22-A114F exceeds 2000 V MM JESD22-A115-A exceeds 200 V (C = 200 pF, R = 0 ) 3. Ordering information Table 1. Ordering information Type number Package Temperature range Name Description Version 74HC109D-Q100 -40 C to +125 C SO16 plastic small outline package 16 leads SOT109-1 body width 3.9 mm 74HCT109D-Q100 74HCT109PW-Q100 -40 C to +125 C TSSOP16 plastic thin shrink small outline package 16 leads SOT403-1 body width 4.4 mmNexperia 74HC109-Q100 74HCT109-Q100 Dual JK flip-flop with set and reset positive-edge-trigger 4. Functional diagram 5 11 1SD 2SD 5 11 SD S S 2 1Q 6 1J J Q 2 14 14 2J 2Q 10 1J 1J 6 10 4 1CP CP 4 12 12 2CP C1 C1 FF 7 9 1Q 7 3 1K 3 13 K Q 1K 1K 13 2Q 9 2K RD 1 15 R R 1RD 2RD (a) (b) 1 15 mna858 mna856 Fig. 1. Logic symbol Fig. 2. IEC logic symbol Q C C C C K Q J C C C C S R C CP C aaa-024066 Fig. 3. Logic diagram (one flip-flop) 74HC HCT109 Q100 All information provided in this document is subject to legal disclaimers. Nexperia B.V. 2020. All rights reserved Product data sheet Rev. 2 1 April 2020 2 / 16