74HC597PW-Q100J Nexperia

74HC597-Q100 74HCT597-Q100 8-bit shift register with input flip-flops Rev. 2 26 October 2021 Product data sheet 1. General description The 74HC597-Q100 74HCT597-Q100 is an 8-bit shift register with input flip-flops. It consists of an 8-bit storage register feeding a parallel-in, serial-out 8-bit shift register. Both the storage register and the shift register have positive edge-triggered clocks. The shift register also has direct load (from storage) and clear inputs. Inputs include clamp diodes that enable the use of current limiting resistors to interface inputs to voltages in excess of V . CC This product has been qualified to the Automotive Electronics Council (AEC) standard Q100 (Grade 1) and is suitable for use in automotive applications. 2. Features and benefits Automotive product qualification in accordance with AEC-Q100 (Grade 1) Specified from -40 C to +85 C and from -40 C to +125 C Wide supply voltage range from 2.0 V to 6.0 V CMOS low power dissipation High noise immunity Input levels: For 74HC597-Q100: CMOS level For 74HCT597-Q100: TTL level 8-bit parallel storage register inputs Shift register has direct overriding load and clear Latch-up performance exceeds 100 mA per JESD 78 Class II Level B Complies with JEDEC standards JESD8C (2.7 V to 3.6 V) JESD7A (2.0 V to 6.0 V) ESD protection: MIL-STD-883, method 3015 exceeds 2000 V HBM JESD22-A114F exceeds 2000 V MM JESD22-A115-A exceeds 200 V (C = 200 pF, R = 0 ) 3. Ordering information Table 1. Ordering information Type number Package Temperature range Name Description Version 74HC597D-Q100 -40 C to +125 C SO16 plastic small outline package 16 leads SOT109-1 body width 3.9 mm 74HCT597D-Q100 74HC597PW-Q100 -40 C to +125 C TSSOP16 plastic thin shrink small outline package 16 leads SOT403-1 body width 4.4 mmNexperia 74HC597-Q100 74HCT597-Q100 8-bit shift register with input flip-flops 4. Functional diagram STCP MR DS 12 10 14 STCP MR DS 15 D0 12 10 14 D0 15 1 D1 D1 1 2 D2 D2 2 3 D3 8-BIT INPUT SHIFT D3 3 INPUT 8-BIT 4 FLIP-FLOPS D4 REGISTER FLIP- SHIFT D4 4 5 FLOPS REGISTER D5 D5 5 6 D6 D6 6 7 9 D7 Q D7 7 9 Q 13 11 13 11 PL SHCP PL SHCP aaa-012057 aaa-012056 Fig. 1. Functional diagram Fig. 2. Logic symbol SRG8 R 10 11 C3/ C2 13 12 C1 1 3D 14 1D 2D 15 1 1D 2D 2 3 4 5 6 9 7 aaa-012055 Fig. 3. IEC Logic symbol 74HC HCT597 Q100 All information provided in this document is subject to legal disclaimers. Nexperia B.V. 2021. All rights reserved Product data sheet Rev. 2 26 October 2021 2 / 19