74HC125-Q100 74HCT125-Q100 Quad buffer/line driver 3-state Rev. 3 4 February 2021 Product data sheet 1. General description The 74HC125-Q100 74HCT125-Q100 is a quad buffer/line driver with 3-state outputs controlled by the output enable inputs (nOE). A HIGH on nOE causes the outputs to assume a high impedance OFF-state. Inputs include clamp diodes which enable the use of current limiting resistors to interface inputs to voltages in excess of V . CC This product has been qualified to the Automotive Electronics Council (AEC) standard Q100 (Grade 1) and is suitable for use in automotive applications. 2. Features and benefits Automotive product qualification in accordance with AEC-Q100 (Grade 1) Specified from -40 C to +85 C and from -40 C to +125 C Wide supply voltage range from 2.0 to 6.0 V CMOS low power dissipation High noise immunity Latch-up performance exceeds 100 mA per JESD 78 Class II Level B Complies with JEDEC standards: JESD8C (2.7 V to 3.6 V) JESD7A (2.0 V to 6.0 V) Input levels: The 74HC125-Q100: CMOS levels The 74HCT125-Q100: TTL levels ESD protection: MIL-STD-883, method 3015 exceeds 2000 V HBM JESD22-A114F exceeds 2000 V MM JESD22-A115-A exceeds 200 V (C = 200 pF, R = 0 ) 3. Ordering information Table 1. Ordering information Type number Package Temperature range Name Description Version 74HC125D-Q100 -40 C to +125 C SO14 plastic small outline package 14 leads SOT108-1 body width 3.9 mm 74HCT125D-Q100 74HC125PW-Q100 -40 C to +125 C TSSOP14 plastic thin shrink small outline package 14 leads SOT402-1 body width 4.4 mm 74HCT125PW-Q100Nexperia 74HC125-Q100 74HCT125-Q100 Quad buffer/line driver 3-state 4. Functional diagram 2 1A 1Y 3 2 1 1 1OE 3 1 EN1 5 2A 2Y 6 5 4 2OE 6 4 9 3A 3Y 8 9 8 3OE 10 10 4A 4Y nA nY 12 11 12 11 4OE 13 13 nOE mna228 mna229 mna227 Fig. 1. Logic symbol Fig. 2. IEC logic symbol Fig. 3. Logic diagram (one buffer) 5. Pinning information 5.1. Pinning 74HC125 74HCT125 1OE 1 14 V CC 74HC125 74HCT125 1A 2 13 4OE 1Y 3 12 4A 1OE 1 14 V CC 1A 2 13 4OE 2OE 4 11 4Y 1Y 3 12 4A 5 10 2A 3OE 2OE 4 11 4Y 2A 5 10 3OE 2Y 6 9 3A 2Y 6 9 3A GND 7 8 3Y GND 7 8 3Y aaa-033163 aaa-003129 Fig. 4. Pin configuration SOT108-1 (SO14) Fig. 5. Pin configuration SOT402-1 (TSSOP14) 5.2. Pin description Table 2. Pin description Symbol Pin Description 1OE, 2OE, 3OE, 4OE 1, 4, 10, 13 output enable input (active LOW) 1A, 2A, 3A, 4A 2, 5, 9, 12 data input 1Y, 2Y, 3Y, 4Y 3, 6, 8, 11 data output GND 7 ground (0 V) V 14 supply voltage CC 74HC HCT125 Q100 All information provided in this document is subject to legal disclaimers. Nexperia B.V. 2021. All rights reserved Product data sheet Rev. 3 4 February 2021 2 / 13