74HCT9046AD,112 Nexperia

74HCT9046A PLL with band gap controlled VCO Rev. 9 20 March 2020 Product data sheet 1. General description The 74HCT9046A. This device features reduced input threshold levels to allow interfacing to TTL logic levels. Inputs also include clamp diodes, this enables the use of current limiting resistors to interface inputs to voltages in excess of V . CC 2. Features and benefits Operation power supply voltage range from 4.5 V to 5.5 V Low power consumption Complies with JEDEC standard no. 7A Inhibit control for ON/OFF keying and for low standby power consumption Center frequency up to 17 MHz (typical) at V = 5.5 V CC Choice of two phase comparators: PC1: EXCLUSIVE-OR PC2: Edge-triggered JK flip-flop No dead zone of PC2 Charge pump output on PC2, whose current is set by an external resistor R bias Center frequency tolerance 10 % Excellent Voltage Controlled Oscillator (VCO) linearity Low frequency drift with supply voltage and temperature variations On-chip band gap reference Glitch free operation of VCO, even at very low frequencies Zero voltage offset due to operational amplifier buffering ESD protection: HBM JESD22-A114F exceeds 2000 V MM JESD22-A115-A exceeds 200 V 3. Applications FM modulation and demodulation where a small center frequency tolerance is essential Frequency synthesis and multiplication where a low jitter is required (e.g. video picture-in-picture) Frequency discrimination Tone decoding Data synchronization and conditioning Voltage-to-frequency conversion Motor-speed control 4. Ordering information Table 1. Ordering information Type number Package Temperature range Name Description Version 74HCT9046AD -40 C to +125 C SO16 plastic small outline package 16 leads body width 3.9 mm SOT109-1Nexperia 74HCT9046A PLL with band gap controlled VCO 5. Functional diagram f out C1 f V in CC VCO OUT C1A C1B COMP IN SIG IN 6 7 4 3 14 16 9046A R2 12 PC1 OUT/ PHASE R3 PCP OUT 2 COMPARATOR R2 1 VCO PC2 OUT 13 R1 11 PHASE COMPARATOR 15 RB 2 R4 R1 R bias C2 5 10 9 8 1 DEM OUT VCO IN GND GND INH R s mbd040 Fig. 1. Block diagram PC1 OUT/ 2 3 COMP IN PCP OUT PLL 9046A 14 SIG IN PC1 OUT/ 15 RB COMP IN 3 2 PC2 OUT 13 PCP OUT 14 SIG IN 13 PC2 OUT C1A 6 6 C1A 7 C1B 7 C1B VCO OUT 4 11 R1 R1 DEM OUT 11 R2 10 12 VCO 12 R2 RB VCO OUT 15 4 9 VCO IN DEM OUT 10 VCO IN 9 5 5 INH INH mbd038 mbd039 Fig. 2. Logic symbol Fig. 3. IEC logic symbol 74HCT9046A All information provided in this document is subject to legal disclaimers. Nexperia B.V. 2020. All rights reserved Product data sheet Rev. 9 20 March 2020 2 / 36