74LVC132AD-Q100J Nexperia

74LVC132A-Q100 Quad 2-input NAND Schmitt trigger Rev. 2 6 July 2020 Product data sheet 1. General description The 74LVC132A-Q100 provides four 2-input NAND gates with Schmitt trigger inputs. It can transform slowly changing input signals into sharply defined, jitter-free output signals. The inputs switch at different points for positive and negative-going signals. The difference between the positive voltage V and the negative voltage V is defined as the input hysteresis voltage V . T+ T- H Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in mixed 3.3 V and 5 V environment. This product has been qualified to the Automotive Electronics Council (AEC) standard Q100 (Grade 1) and is suitable for use in automotive applications. 2. Features and benefits Automotive product qualification in accordance with AEC-Q100 (Grade 1) Specified from -40 C to +85 C and from -40 C to +125 C Wide supply voltage range from 1.2 V to 3.6 V 5 V tolerant inputs for interfacing with 5 V logic CMOS low-power consumption Direct interface with TTL levels Unlimited input rise and fall times Inputs accept voltages up to 5.5 V Complies with JEDEC standard JESD8-C/JESD36 (2.7 V to 3.6 V) ESD protection: MIL-STD-883, method 3015 exceeds 2000 V HBM JESD22-A114F exceeds 2000 V MM JESD22-A115-A exceeds 200 V (C = 200 pF, R = 0 ) Multiple package options DHVQFN package with Side-Wettable Flanks enabling Automatic Optical Inspection (AOI) of solder joints 3. Applications Wave and pulse shapers for highly noisy environments Astable multivibrator Monostable multivibrator.Nexperia 74LVC132A-Q100 Quad 2-input NAND Schmitt trigger 4. Ordering information Table 1. Ordering information Type number Package Temperature range Name Description Version 74LVC132AD-Q100 -40 C to +125 C SO14 plastic small outline package 14 leads SOT108-1 body width 3.9 mm 74LVC132APW-Q100 -40 C to +125 C TSSOP14 plastic thin shrink small outline package SOT402-1 14 leads body width 4.4 mm 74LVC132ABQ-Q100 -40 C to +125 C DHVQFN14 plastic dual in-line compatible thermal SOT762-1 enhanced very thin quad flat package no leads 14 terminals body 2.5 3 0.85 mm 5. Functional diagram 1 3 & 1 1A 2 1Y 3 2 1B 4 4 2A 6 & 2Y 6 5 5 2B 9 3A 9 3Y 8 8 & 10 3B 10 A 12 4A 12 4Y 11 11 Y 13 4B & 13 B mna212 mna246 001aac532 Fig. 1. Logic symbol Fig. 2. IEC logic symbol Fig. 3. Logic diagram (one gate) 6. Pinning information 6.1. Pinning 74LVC132A-Q100 terminal 1 index area 1B 2 13 4B 1Y 3 12 4A 74LVC132A-Q100 4 11 2A 4Y 2B 5 10 3B GND(1) 1A 1 14 V CC 2Y 6 9 3A 1B 2 13 4B 1Y 3 12 4A 2A 4 11 4Y aaa-006926 2B 5 10 3B Transparent top view 2Y 6 9 3A (1) This is not a ground pin. There is no electrical or GND 7 8 3Y mechanical requirement to solder the pad. In case aaa-006925 soldered, the solder land should remain floating or connected to GND. Fig. 4. Pin configuration SOT108-1 (SO14) and SOT402-1 (TSSOP14) Fig. 5. Pin configuration SOT762-1 (DHVQFN14) 74LVC132A Q100 All information provided in this document is subject to legal disclaimers. Nexperia B.V. 2020. All rights reserved Product data sheet Rev. 2 6 July 2020 2 / 14 GND 7 1 1A 3Y 8 14 V CC