74LVC1G125GV-Q100, Nexperia

74LVC1G125-Q100 Bus buffer/line driver 3-state Rev. 4 7 October 2021 Product data sheet 1. General description The 74LVC1G125-Q100 is a single buffer/line driver with 3-state output. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in mixed 3.3 V and 5 V environments. Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times. This device is fully specified for partial power down applications using I . OFF The I circuitry disables the output, preventing the potentially damaging backflow current through OFF the device when it is powered down. This product has been qualified to the Automotive Electronics Council (AEC) standard Q100 (Grade 1) and is suitable for use in automotive applications. 2. Features and benefits Automotive product qualification in accordance with AEC-Q100 (Grade 1) Specified from -40 C to +85 C and from -40 C to +125 C Wide supply voltage range from 1.65 V to 5.5 V Overvoltage tolerant inputs to 5.5 V High noise immunity CMOS low power consumption I circuitry provides partial Power-down mode operation OFF 24 mA output drive (V = 3.0 V) CC Latch-up performance exceeds 250 mA Direct interface with TTL levels Complies with JEDEC standards: JESD8-7 (1.65 V to 1.95 V) JESD8-5 (2.3 V to 2.7 V) JESD8C (2.7 V to 3.6 V) JESD36 (4.5 V to 5.5 V) ESD protection: MIL-STD-883, method 3015 exceeds 2000 V HBM JESD22-A114F exceeds 2000 V MM JESD22-A115-A exceeds 200 V (C = 200 pf, R = 0 ) Multiple package options 3. Ordering information Table 1. Ordering information Type number Package Temperature range Name Description Version 74LVC1G125GW-Q100 -40 C to +125 C TSSOP5 plastic thin shrink small outline package 5 leads SOT353-1 body width 1.25 mm 74LVC1G125GV-Q100 -40 C to +125 C SC-74A plastic surface-mounted package 5 leads SOT753 74LVC1G125GM-Q100 -40 C to +125 C XSON6 plastic extremely thin small outline package SOT886 no leads 6 terminals body 1 1.45 0.5 mmNexperia 74LVC1G125-Q100 Bus buffer/line driver 3-state 4. Marking Table 2. Marking Type number Marking code 1 74LVC1G125GW-Q100 VM 74LVC1G125GV-Q100 V25 74LVC1G125GM-Q100 VM 1 The pin 1 indicator is located on the lower left corner of the device, below the marking code. 5. Functional diagram A Y 2 4 Y A 2 4 1 OE 1 EN OE mna118 mna119 mna120 Fig. 1. Logic symbol Fig. 2. IEC logic symbol Fig. 3. Logic diagram 6. Pinning information 6.1. Pinning 74LVC1G125 74LVC1G125 OE 1 6 V CC OE 1 5 V CC A 2 5 n.c. A 2 GND 3 4 Y 3 4 GND Y 001aaf199 001aaf198 Transparent top view Fig. 4. Pin configuration SOT353-1 (TSSOP5) and SOT753 (SC-74A) Fig. 5. Pin configuration SOT886 (XSON6) 6.2. Pin description Table 3. Pin description Symbol Pin Description TSSOP5 and SC-74A XSON6 OE 1 1 output enable input A 2 2 data input GND 3 3 ground (0 V) Y 4 4 data output n.c. - 5 not connected V 5 6 supply voltage CC 74LVC1G125 Q100 All information provided in this document is subject to legal disclaimers. Nexperia B.V. 2021. All rights reserved Product data sheet Rev. 4 7 October 2021 2 / 14