74LVC273PW-Q100J Nexperia

74LVC273-Q100 Octal D-type flip-flop with reset positive-edge trigger Rev. 2 28 August 2020 Product data sheet 1. General description The 74LVC273-Q100 is an octal positive-edge triggered D-type flip-flop. The device features clock (CP) and master reset (MR) inputs. The outputs Qn will assume the state of their corresponding D inputs that meet the set-up and hold time requirements on the LOW-to-HIGH clock (CP) transition. A LOW on MR forces the outputs LOW independently of clock and data inputs. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in mixed 3.3 V and 5 V environments. Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times. This product has been qualified to the Automotive Electronics Council (AEC) standard Q100 (Grade 1) and is suitable for use in automotive applications. 2. Features and benefits Automotive product qualification in accordance with AEC-Q100 (Grade 1) Specified from -40 C to +85 C and from -40 C to +125 C Wide supply voltage range from 1.2 V to 3.6 V Overvoltage tolerant inputs to 5.5 V CMOS low power consumption Direct interface with TTL levels Output drive capability 50 transmission lines at +85 C Complies with JEDEC standard: JESD8-7A (1.65 V to 1.95 V) JESD8-5A (2.3 V to 2.7 V) JESD8-C/JESD36 (2.7 V to 3.6 V) ESD protection: MIL-STD-883, method 3015 exceeds 2000 V HBM JESD22-A114F exceeds 2000 V MM JESD22-A115-A exceeds 200 V (C = 200 pF, R = 0 ) DHVQFN package with Side-Wettable Flanks enabling Automatic Optical Inspection (AOI) of solder joints 3. Ordering information Table 1. Ordering information Type number Package Temperature range Name Description Version 74LVC273D-Q100 -40 C to +125 C SO20 plastic small outline package 20 leads SOT163-1 body width 7.5 mm 74LVC273PW-Q100 -40 C to +125 C TSSOP20 plastic thin shrink small outline package SOT360-1 20 leads body width 4.4 mm 74LVC273BQ-Q100 -40 C to +125 C DHVQFN20 plastic dual in-line compatible thermal SOT764-1 enhanced very thin quad flat package no leads 20 terminals body 2.5 4.5 0.85 mmNexperia 74LVC273-Q100 Octal D-type flip-flop with reset positive-edge trigger 4. Functional diagram 11 CP C1 1 R MR 11 3 2 1D CP D0 Q0 3 2 D0 Q0 4 5 D1 Q1 4 5 D1 Q1 7 6 7 6 D2 Q2 D2 Q2 8 9 8 9 D3 Q3 D3 Q3 13 12 13 12 D4 Q4 D4 Q4 14 15 14 15 D5 Q5 D5 Q5 17 16 D6 Q6 17 16 D6 Q6 18 19 D7 Q7 18 19 MR D7 Q7 1 mna763 mna764 Fig. 1. Logic symbol Fig. 2. IEC logic symbol 5. Pinning information 5.1. Pinning 74LVC273-Q100 terminal 1 index area 2 19 Q0 Q7 D0 3 18 D7 D1 4 17 D6 74LVC273-Q100 Q1 5 16 Q6 MR 1 20 V Q2 6 15 Q5 CC 2 19 Q0 Q7 7 14 D2 D5 3 18 D0 D7 D3 8 (1) 13 D4 GND D1 4 17 D6 Q3 9 12 Q4 5 16 Q1 Q6 6 15 Q2 Q5 D2 7 14 D5 aaa-009070 8 13 D3 D4 Transparent top view 9 12 Q3 Q4 (1) This is not a ground pin. There is no electrical or GND 10 11 CP mechanical requirement to solder the pad. In case aaa-009069 soldered, the solder land should remain floating or connected to GND. Fig. 3. Pin configuration for SOT163-1 (SO20) and SOT360-1 (TSSOP20) Fig. 4. Pin configuration for SOT764-1 (DHVQFN20) 74LVC273 Q100 All information provided in this document is subject to legal disclaimers. Nexperia B.V. 2020. All rights reserved Product data sheet Rev. 2 28 August 2020 2 / 14 GND 10 1 MR CP 11 20 V CC