74LVC2G241DC-Q100H Nexperia

74LVC2G241-Q100 Dual buffer/line driver 3-state Rev. 3 22 November 2018 Product data sheet 1. General description The 74LVC2G241-Q100 is a dual non-inverting buffer/line driver with 3-state outputs. The 3-state outputs are controlled by the output enable inputs 1OE and 2OE: A HIGH level at pin 1OE causes output 1Y to assume a high-impedance OFF-state. A LOW level at pin 2OE causes output 2Y to assume a high-impedance OFF-state. Schmitt trigger action at all inputs makes the circuit highly tolerant of slower input rise and fall times. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of the 74LVC2G241-Q100 as a translator in a mixed 3.3 V and 5 V environment. This device is fully specified for partial power-down applications using I . The I circuitry OFF OFF disables the output, preventing a damaging backflow current through the device when it is powered down. This product has been qualified to the Automotive Electronics Council (AEC) standard Q100 (Grade 1) and is suitable for use in automotive applications. 2. Features and benefits Automotive product qualification in accordance with AEC-Q100 (Grade 1) Specified from -40 C to +85 C and from -40 C to +125 C Wide supply voltage range from 1.65 V to 5.5 V 5 V tolerant input/output for interfacing with 5 V logic High noise immunity Complies with JEDEC standard: JESD8-7 (1.65 V to 1.95 V) JESD8-5 (2.3 V to 2.7 V) JESD8-B/JESD36 (2.7 V to 3.6 V) ESD protection: MIL-STD-883, method 3015 exceeds 2000 V HBM JESD22-A114F exceeds 2000 V MM JESD22-A115-A exceeds 200 V (C = 200 pF R = 0 ) 24 mA output drive (V = 3.0 V) CC CMOS low power consumption Latch-up performance exceeds 250 mA Direct interface with TTL levels Inputs accept voltages up to 5 VNexperia 74LVC2G241-Q100 Dual buffer/line driver 3-state 3. Ordering information Table 1. Ordering information Type number Package Temperature range Name Description Version 74LVC2G241DP-Q100 -40 C to +125 C TSSOP8 plastic thin shrink small outline package 8 leads SOT505-2 body width 3 mm lead length 0.5 mm 74LVC2G241DC-Q100 -40 C to +125 C VSSOP8 plastic very thin shrink small outline package SOT765-1 8 leads body width 2.3 mm 4. Marking Table 2. Marking codes Type number Marking code 1 74LVC2G241DP-Q100 V241 74LVC2G241DC-Q100 V41 1 The pin 1 indicator is located on the lower left corner of the device, below the marking code. 5. Functional diagram 1OE 1Y 1A 1 EN1 2OE 2Y 2A 2 EN2 001aah844 001aah845 Fig. 1. Logic symbol Fig. 2. IEC logic symbol 6. Pinning information 6.1. Pinning 74LVC2G241 1OE 1 8 V CC 1A 2 7 2OE 3 6 2Y 1Y GND 4 5 2A 001aab569 Fig. 3. Pin configuration SOT505-2 (TSSOP8) and SOT765-1 (VSSOP8) 74LVC2G241 Q100 All information provided in this document is subject to legal disclaimers. Nexperia B.V. 2018. All rights reserved Product data sheet Rev. 3 22 November 2018 2 / 13