74LVCU04A-Q100 Hex unbuffered inverter Rev. 2 31 March 2021 Product data sheet 1. General description The 74LVCU04A-Q100 is a hex unbuffered inverter. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in mixed 3.3 V and 5 V environments. Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times. This product has been qualified to the Automotive Electronics Council (AEC) standard Q100 (Grade 1) and is suitable for use in automotive applications. 2. Features and benefits Automotive product qualification in accordance with AEC-Q100 (Grade 1) Specified from -40 C to +85 C and from -40 C to +125 C Wide supply voltage range from 1.2 V to 3.6 V Inputs accept voltages up to 5.5 V CMOS low power consumption Direct interface with TTL levels Complies with JEDEC standard: JESD8-7A (1.65 V to 1.95 V) JESD8-5A (2.3 V to 2.7 V) JESD8-C/JESD36 (2.7 V to 3.6 V) ESD protection: MIL-STD-883, method 3015 exceeds 2000 V HBM JESD22-A114F exceeds 2000 V MM JESD22-A115-A exceeds 200 V (C = 200 pF, R = 0 ) DHVQFN package with Side-Wettable Flanks enabling Automatic Optical Inspection (AOI) of solder joints 3. Ordering information Table 1. Ordering information Type number Package Temperature range Name Description Version 74LVCU04AD-Q100 -40 C to +125 C SO14 plastic small outline package 14 leads SOT108-1 body width 3.9 mm 74LVCU04APW-Q100 -40 C to +125 C TSSOP14 plastic thin shrink small outline package SOT402-1 14 leads body width 4.4 mmNexperia 74LVCU04A-Q100 Hex unbuffered inverter 4. Functional diagram 1 1 2 1 1A 1Y 2 1 3 4 3 2A 2Y 4 1 5 6 5 3A 3Y 6 1 9 8 4Y 9 4A 8 V V CC CC 1 5A 5Y 10 11 11 10 100 nA nY 13 6A 6Y 12 1 13 12 mna926 mna925 mna927 Fig. 1. Logic symbol Fig. 2. IEC logic symbol Fig. 3. Schematic diagram for one inverter 5. Pinning information 5.1. Pinning 74LVCU04A 1 14 1A V CC 74LVCU04A 1Y 2 13 6A 1A 1 14 V 2A 3 12 6Y CC 1Y 2 13 6A 4 11 2Y 5A 2A 3 12 6Y 2Y 4 11 5A 3A 5 10 5Y 3A 5 10 5Y 6 9 3Y 4A 3Y 6 9 4A GND 7 8 4Y GND 7 8 4Y aaa-024873 aaa-024874 Fig. 4. Pin configuration SOT108-1 (SO14) Fig. 5. Pin configuration SOT402-1 (TSSOP14) 5.2. Pin description Table 2. Pin description Symbol Pin Description 1A, 2A, 3A, 4A, 5A, 6A 1, 3, 5, 9, 11, 13 data input 1Y, 2Y, 3Y, 4Y, 5Y, 6Y 2, 4, 6, 8, 10, 12 data output GND 7 ground (0 V) V 14 supply voltage CC 74LVCU04A Q100 All information provided in this document is subject to legal disclaimers. Nexperia B.V. 2021. All rights reserved Product data sheet Rev. 2 31 March 2021 2 / 12