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is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.74LVX14 Low Voltage Hex Inverter with Schmitt Trigger Input
February 2008
74LVX14
Low Voltage Hex Inverter with Schmitt Trigger Input
Features General Description
Input voltage level translation from 5V to 3V The LVX14 contains six inverter gates each with a
Schmitt trigger input. They are capable of transforming
Ideal for low power/low noise 3.3V applications
slowly changing input signals into sharply defined, jitter-
Guaranteed simultaneous switching noise level and
free output signals. In addition, they have a greater noise
dynamic threshold performance
margin than conventional inverters.
The LVX14 has hysteresis between the positive-going
and negative-going input thresholds (typically 1.0V)
which is determined internally by transistor ratios and is
essentially insensitive to temperature and supply voltage
variations.
The inputs tolerate voltages up to 7V allowing the inter-
face of 5V systems to 3V systems.
Ordering Information
Order Package
Number Number Package Description
74LVX14M M14A 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
74LVX14SJ M14D 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
74LVX14MTC MTC14 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Device also available in Tape and Reel. Specify by appending suffix letter X to the ordering number.
All packages are lead free per JEDEC: J-STD-020B standard.
1993 Fairchild Semiconductor Corporation www.fairchildsemi.com
74LVX14 Rev. 1.5.0