74LVT04-Q100 3.3 V Hex inverter Rev. 2 1 April 2021 Product data sheet 1. General description The 74LVT04-Q100 is a hex inverter. This device is fully specified for partial power down applications using I . The I circuitry disables the output, preventing the potentially damaging OFF OFF backflow current through the device when it is powered down. This product has been qualified to the Automotive Electronics Council (AEC) standard Q100 (Grade 3) and is suitable for use in automotive applications. 2. Features and benefits Automotive product qualification in accordance with AEC-Q100 (Grade 3) Specified from -40 C to +85 C Wide supply voltage range from 2.7 to 3.6 V Overvoltage tolerant inputs to 5.5 V BiCMOS high speed and output drive Direct interface with TTL levels No bus current loading when output is tied to 5 V bus Power-up 3-state I circuitry provides partial Power-down mode operation OFF Latch-up performance exceeds 500 mA per JESD 78 Class II Level B Complies with JEDEC standards: JESD8C (2.7 V to 3.6 V) ESD protection: MIL-STD-883, method 3015 exceeds 2000 V HBM JESD22-A114F exceeds 2000 V MM JESD22-A115-A exceeds 200 V (C = 200 pF, R = 0 ) 3. Ordering information Table 1. Ordering information Type number Package Temperature range Name Description Version 74LVT04D-Q100 -40 C to +85 C SO14 plastic small outline package 14 leads SOT108-1 body width 3.9 mm 74LVT04PW-Q100 -40 C to +85 C TSSOP14 plastic thin shrink small outline package SOT402-1 14 leads body width 4.4 mmNexperia 74LVT04-Q100 3.3 V Hex inverter 4. Functional diagram 1 1 2 1A 1Y 2 1 1 3 4 3 2A 2Y 4 1 5 6 5 3A 3Y 6 1 9 8 4Y 9 4A 8 1 5Y 11 5A 10 11 10 13 6A 6Y 12 1 13 12 A Y mna342 mna343 mna341 Fig. 1. Logic symbol Fig. 2. IEC logic symbol Fig. 3. Logic diagram for one gate 5. Pinning information 5.1. Pinning 74LVT04 1 14 1A V CC 74LVT04 1Y 2 13 6A 1A 1 14 V 2A 3 12 6Y CC 1Y 2 13 6A 4 11 2Y 5A 2A 3 12 6Y 2Y 4 11 5A 3A 5 10 5Y 3A 5 10 5Y 6 9 3Y 4A 3Y 6 9 4A GND 7 8 4Y GND 7 8 4Y aaa-013009 aaa-033317 Fig. 4. Pin configuration SOT108-1 (SO14) Fig. 5. Pin configuration SOT402-1 (TSSOP14) 5.2. Pin description Table 2. Pin description Symbol Pin Description nA 1, 3, 5, 9, 11, 13 data input nY 2, 4, 6, 8, 10, 12 data output GND 7 ground (0 V) V 14 supply voltage CC 74LVT04 Q100 All information provided in this document is subject to legal disclaimers. Nexperia B.V. 2021. All rights reserved Product data sheet Rev. 2 1 April 2021 2 / 10