74AHC595PW,112 NXP

74AHC595 74AHCT595 8-bit serial-in/serial-out or parallel-out shift register with output latches Rev. 5 4 July 2012 Product data sheet 1. General description The 74AHC595 74AHCT595 are high-speed Si-gate CMOS devices and are pin compatible with Low-power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard No. 7A. The 74AHC595 74AHCT595 are 8-stage serial shift registers with a storage register and 3-state outputs. The registers have separate clocks. Data is shifted on the positive-going transitions of the shift register clock input (SHCP). The data in each register is transferred to the storage register on a positive-going transition of the storage register clock input (STCP). If both clocks are connected together, the shift register will always be one clock pulse ahead of the storage register. The shift register has a serial input (DS) and a serial standard output (Q7S) for cascading. It is also provided with asynchronous reset (active LOW) for all 8 shift register stages. The storage register has 8 parallel 3-state bus driver outputs. Data in the storage register appears at the output whenever the output enable input (OE) is LOW. 2. Features and benefits Balanced propagation delays All inputs have Schmitt-trigger action Inputs accept voltages higher than V CC Input levels: The 74AHC595 operates with CMOS input levels The 74AHCT595 operates with TTL input levels ESD protection: HBM JESD22-A114F exceeds 2000 V MM JESD22-A115-A exceeds 200 V CDM JESD22-C101E exceeds 1000 V Multiple package options Specified from 40 C to +85 C and from 40 C to +125 C 3. Applications Serial-to-parallel data conversion Remote control holding register74AHC595 74AHCT595 NXP Semiconductors 8-bit serial-in/serial-out or parallel-out shift register with output latches 4. Ordering information Table 1. Ordering information Type number Package Temperature range Name Description Version 74AHC595 74AHC595D 40 C to +125 C SO16 plastic small outline package 16 leads body SOT109-1 width 3.9 mm 74AHC595PW 40 C to +125 C TSSOP16 plastic thin shrink small outline package 16 leads SOT403-1 body width 4.4 mm 74AHC595BQ 40 C to +125 C DHVQFN16 plastic dual in-line compatible thermal enhanced SOT763-1 very thin quad flat package no leads 16 terminals body 2.5 3.5 0.85 mm 74AHCT595 74AHCT595D 40 C to +125 C SO16 plastic small outline package 16 leads body SOT109-1 width 3.9 mm 74AHCT595PW 40 C to +125 C TSSOP16 plastic thin shrink small outline package 16 leads SOT403-1 body width 4.4 mm 74AHCT595BQ 40 C to +125 C DHVQFN16 plastic dual in-line compatible thermal enhanced SOT763-1 very thin quad flat package no leads 16 terminals body 2.5 3.5 0.85 mm 5. Functional diagram 14 DS 11 SHCP 8-STAGE SHIFT REGISTER 10 MR Q7S 9 12 STCP 8-BIT STORAGE REGISTER 13 OE 3-STATE OUTPUTS Q0 Q1 Q2 Q3 Q4 Q5 Q6 Q7 15 1 234567 mna554 Fig 1. Functional diagram 74AHC AHCT595 All information provided in this document is subject to legal disclaimers. NXP B.V. 2012. All rights reserved. Product data sheet Rev. 5 4 July 2012 2 of 22