74HCT4016N NXP

INTEGRATED CIRCUITS DATA SHEET For a complete data sheet, please also download: The IC06 74HC/HCT/HCU/HCMOS Logic Family Specifications The IC06 74HC/HCT/HCU/HCMOS Logic Package Information The IC06 74HC/HCT/HCU/HCMOS Logic Package Outlines 74HC/HCT4016 Quad bilateral switches December 1990 Product specication File under Integrated Circuits, IC06Philips Semiconductors Product specication Quad bilateral switches 74HC/HCT4016 4000B series. They are specified in compliance with FEATURES JEDEC standard no. 7A. Low ON resistance: The 74HC/HCT4016 have four independent analog 160 (typ.) at V = 4.5 V CC switches (transmission gates). 120 (typ.) at V = 6.0 V CC Each switch has two input/output terminals (Y ,Z ) and an n n 80 (typ.) at V = 9.0 V CC active HIGH enable input (E ). When E is connected to n n Individual switch controls V , a low bidirectional path between Y and Z is CC n n established (ON condition). When E is connected to n Typical break before make built in ground (GND), the switch is disabled and a high Output capability: non-standard impedance between Y and Z is established (OFF n n I category: SSI CC condition). Current through a switch will not cause additional GENERAL DESCRIPTION V current provided the voltage at the terminals of the CC switch is maintained within the supply voltage range The 74HC/HCT4016 are high-speed Si-gate CMOS V >> (V ,V ) >> GND. Inputs Y and Z are electrically CC Y Z n n devices and are pin compatible with the 4016 of the equivalent terminals. QUICK REFERENCE DATA GND = 0 V T = 25 C t = t = 6 ns amb r f TYPICAL SYMBOL PARAMETER CONDITIONS UNIT HC HCT t / t turn ON time E to V 16 17 ns PZH PZL n OS C = 15 pF R =1 k L L V = 5 V t / t turn OFF time E to V CC 14 20 ns PHZ PLZ n OS C input capacitance 3.5 3.5 pF I C power dissipation capacitance per switch notes 1 and 2 12 12 pF PD C max. switch capacitance 5 5 pF S Notes 1. C is used to determine the dynamic power dissipation (P in W): PD D 2 2 P = C V f + (C +C ) V f where: D PD CC i L S CC o f = input frequency in MHz i f = output frequency in MHz o 2 (C + C ) V f = sum of outputs L S CC o C = output load capacitance in pF L C = max. switch capacitance in pF S V = supply voltage in V CC 2. For HC the condition is V = GND to V I CC For HCT the condition is V = GND to V - 1.5 V I CC ORDERING INFORMATION See 74HC/HCT/HCU/HCMOS Logic Package Information. December 1990 2