DSP56374 Freescale Semiconductor Rev. 4.2, 1/2007 Data Sheet: Technical Data DSP56374 Data Sheet Table of Contents 1 Overview 1 Overview 1 2 Features 3 The DSP56374 is a high-density CMOS device with 3 Documentation . 5 3.3 V inputs and outputs. 4 Signal Groupings . 5 5 Maximum Ratings 25 NOTE 6 Power Requirements . 26 This document contains information on a 7 Thermal Characteristics . 27 8 DC Electrical Characteristics . 28 new product. Specifications and 9 AC Electrical Characteristics 29 information herein are subject to change 10 Internal Clocks 29 without notice. 11 External Clock Operation 29 12 Reset, Stop, Mode Select, and Interrupt Timing . 32 For software or simulation models (for 13 Serial Host Interface SPI Protocol Timing 35 example, IBIS files), contact sales or go 2 14 Serial Host Interface (SHI) I C Protocol Timing . 41 to www.freescale.com. 15 Programming the Serial Clock 43 16 Enhanced Serial Audio Interface Timing . 44 The DSP56374 supports digital audio applications 17 Timer Timing 49 requiring sound field processing, acoustic equalization, 18 GPIO Timing 50 19 JTAG Timing 50 and other digital audio algorithms. The DSP56374 uses 20 Watchdog Timer Timing . 53 the high performance, single-clock-per-cycle DSP56300 core family of programmable CMOS digital signal processors (DSPs) combined with the audio signal processing capability of the Freescale Semiconductor, Inc. Symphony DSP family, as shown in Figure 1. Significant architectural enhancements include a barrel shifter, 24-bit addressing, and direct memory access Freescale Semiconductor, Inc., 2004, 2005, 2006, 2007. All rights reserved.Overview (DMA). The DSP56374 offers 150 million instructions per second (MIPS) using an internal 150 MHz clock. Data Sheet Conventions This data sheet uses the following conventions: Used to indicate a signal that is active when pulled low (For example, OVERBAR the RESET pin is active when low.) asserted Means that a high true (active high) signal is high or that a low true (active low) signal is low deasserted Means that a high true (active high) signal is low or that a low true (active low) signal is high Examples: Signal/ Logic State Signal State Voltage* Symbol PIN True Asserted V / V IL OL PIN False Deasserted V / V IH OH PIN True Asserted V / V IH OH PIN False Deasserted V / V IL OL Note: *Values for V , V , V , and V are defined by individual product specifications. IL OL IH OH DSP56374 Data Sheet, Rev. 4.2 2 Freescale Semiconductor