IP4769CZ14,118 NXP

IP4769CZ14 VGA interface ESD protection with integrated termination resistors Rev. 1 17 January 2011 Product data sheet 1. Product profile 1.1 General description The IP4769CZ14 connects between the Video Graphics Adapter (VGA)/Digital Video Interface (DVI) and the video transmitter like e.g. a PC graphic card or the VGA receiver like e.g. a PC Monitor. The IP4769CZ14 includes ElectroStatic Discharge (ESD) protection for the Data Display Channel (DDC) signals, DDC level shifting and ESD protection for both SYNChronization (SYNC) lines as well as high-level ESD protection diodes for the Red-Green-Blue (RGB) signal lines. The DDC level shifting can be used to shift the 5 V DDC bus at the connector side to 3.3 V or 2.5 V on the internal side. 1.2 Features and benefits Pb-free, Restriction of Hazardous Substances (RoHS) compliant and free of halogen and antimony (Dark Green compliant) Integrated high-level ESD protection and level shifting DDC level shifting from 5 V to 3.3 V or 2.5 V IEC 61000-4-2, 4 kV rail-to-rail clamping for each I/O line Channel capacitance C <4pF ch 1.3 Applications To reduce ElectroMagnetic Interferences (EMI)/Radio Frequency Interferences (RFI) and to provide downstream ESD protection for: VGA interfaces including DDC channels Desktop and notebook PCs Graphics cards Set-top boxesIP4769CZ14 NXP Semiconductors VGA interface ESD protection with integrated termination resistors 2. Pinning information 2.1 Pinning VIDEO 2 1 14 VIDEO 3 VIDEO 1 2 13 SYNC OUT2 V 3 12 SYNC OUT1 BIAS VIDEO GND 4 11 DDC OUT2 GND 5 10 DDC IN2 V 6 9 DDC IN1 BIAS DDC BYP 7 8 DDC OUT1 018aaa067 Fig 1. Pin configuration 2.2 Pin description Table 1. Pin description Symbol Pin Description VIDEO 2 1 video signal ESD protection channel 2 VIDEO 1 2 video signal ESD protection channel 1 V 3 ESD bias voltage for VIDEO 1, VIDEO 2 and VIDEO 3 protection circuit BIAS VIDEO GND 4 ground GND 5 ground V 6 bias voltage for DDC level shifter N-FET gates BIAS DDC BYP 7 optional external 100 nF bypass capacitor to enhance internal zener performance on SYNC OUT1, SYNC OUT2, DDC OUT1 and DDC OUT2 DDC OUT1 8 DDC signal output 1 connector side DDC IN1 9 DDC signal input 1 VGA controller side DDC IN2 10 DDC signal input 2 VGA controller side DDC OUT2 11 DDC signal output 2 connector side SYNC OUT1 12 SYNC signal output 1 ESD clamp connector side SYNC OUT2 13 SYNC signal output 2 ESD clamp connector side VIDEO 3 14 video signal ESD protection channel 3 3. Ordering information Table 2. Ordering information Type number Package Name Description Version IP4769CZ14 TSSOP14 plastic shrink small outline package 14 leads SOT402-1 body width 4.4 mm IP4769CZ14 All information provided in this document is subject to legal disclaimers. NXP B.V. 2011. All rights reserved. Product data sheet Rev. 1 17 January 2011 2 of 11