LPC112x 32-bit ARM Cortex-M0 microcontroller 64 kB flash and 8 kB SRAM 12-bit ADC Rev. 1 24 February 2015 Product data sheet 1. General description The LPC112x are a ARM Cortex-M0 based, low-cost 32-bit MCU family, designed for 8/16-bit microcontroller applications, offering performance, low power, simple instruction set and memory addressing together with reduced code size compared to existing 8/16-bit architectures. The LPC112x operate at CPU frequencies of up to 50 MHz. The peripheral complement of the LPC112x includes 64 kB of flash memory, 8 kB of data 2 memory, one Fast-mode Plus I C-bus interface, three RS-485/EIA-485 UARTs, two SSP interfaces, four general purpose counter/timers, a 12-bit ADC, and up to 38 general purpose I/O pins. 2. Features and benefits System: ARM Cortex-M0 processor, running at frequencies of up to 50 MHz. ARM Cortex-M0 built-in Nested Vectored Interrupt Controller (NVIC). Non-Maskable Interrupt (NMI) input selectable from several input sources. Serial Wire Debug. System tick timer. Memory: 64 kB on-chip flash programming memory. 256 byte page erase function. 8 kB SRAM. In-System Programming (ISP) and In-Application Programming (IAP) via on-chip bootloader software. Digital peripherals: Up to 38 General Purpose I/O (GPIO) pins with configurable pull-up/pull-down resistors. A configurable open-drain mode is supported. GPIO pins can be used as edge and level sensitive interrupt sources. High-current output driver (20 mA) on one pin. 2 High-current sink drivers (20 mA) on two I C-bus pins in Fast-mode Plus. Four general purpose counter/timers with up to six capture inputs and up to 13 match outputs. Programmable windowed WDT. Analog peripherals: 12-bit ADC with 2 Msamples/s and eight channels.LPC112x NXP Semiconductors 32-bit ARM Cortex-M0 microcontroller Serial interfaces: Three UARTs with fractional baud rate generation, internal FIFO, and RS-485 support. One UART with modem control. Two SSP controllers with FIFO and multi-protocol capabilities. 2 2 I C-bus interface supporting full I C-bus specification and Fast-mode Plus with a data rate of 1 Mbit/s with multiple address recognition and monitor mode. Clock generation: 12 MHz internal RC oscillator trimmed to 1 % accuracy for 25 C T +85 C amb that can optionally be used as a system clock. Crystal oscillator with an operating range of 1 MHz to 25 MHz. Programmable watchdog oscillator with a frequency range of 9.4 kHz to 2.3 MHz. PLL allows CPU operation up to the maximum CPU rate without the need for a high-frequency crystal. May be run from the system oscillator or the internal RC oscillator. Clock output function with divider that can reflect the system oscillator clock, IRC clock, CPU clock, and the Watchdog clock. Power control: Integrated PMU (Power Management Unit) to minimize power consumption during Sleep, Deep-sleep, and Deep power-down modes. Power profiles residing in boot ROM allowing to optimize performance and minimize power consumption for any given application through one simple function call. Three reduced power modes: Sleep, Deep-sleep, and Deep power-down. Processor wake-up from Deep-sleep mode via a dedicated start logic using up to 13 of the functional pins. Power-On Reset (POR). Brownout detect with up to four separate thresholds for interrupt and forced reset. Unique device serial number for identification. Single power supply (1.8 V to 3.6 V). Available as LQFP48 package. 3. Applications eMetering Lighting Alarm systems White goods 4. Ordering information Table 1. Ordering information Type number Package Name Description Version LPC1125JBD48/303 LQFP48 LQFP48: plastic low profile quad flat package 48 leads body 7 7 SOT313-2 1.4 mm LPC1124JBD48/303 LQFP48 LQFP48: plastic low profile quad flat package 48 leads body 7 7 SOT313-2 1.4 mm LPC112x All information provided in this document is subject to legal disclaimers. NXP Semiconductors N.V. 2015. All rights reserved. Product data sheet Rev. 1. 24 February 2015 2 of 63