LPC15xx 32-bit ARM Cortex-M3 microcontroller up to 256 kB flash and 36 kB SRAM FS USB, CAN, RTC, SPI, USART, I2C Rev. 1.1 29 April 2015 Product data sheet 1. General description The LPC15xx are ARM Cortex-M3 based microcontrollers for embedded applications featuring a rich peripheral set with very low power consumption. The ARM Cortex-M3 is a next generation core that offers system enhancements such as enhanced debug features and a higher level of support block integration. The LPC15xx operate at CPU frequencies of up to 72 MHz. The ARM Cortex-M3 CPU incorporates a 3-stage pipeline and uses a Harvard architecture with separate local instruction and data buses as well as a third bus for peripherals. The ARM Cortex-M3 CPU also includes an internal prefetch unit that supports speculative branching. The LPC15xx includes up to 256 kB of flash memory, 32 kB of ROM, a 4 kB EEPROM, and up to 36 kB of SRAM. The peripheral complement includes one full-speed USB 2.0 2 device, two SPI interfaces, three USARTs, one Fast-mode Plus I C-bus interface, one C CAN module, PWM/timer subsystem with four configurable, multi-purpose State Configurable Timers (SCTimer/PWM) with input pre-processing unit, a Real-time clock module with independent power supply and a dedicated oscillator, two 12-channel/12-bit, 2 Msamples/s ADCs, one 12-bit, 500 kSamples/s DAC, four voltage comparators with internal voltage reference, and a temperature sensor. A DMA engine can service most peripherals. For additional documentation related to the LPC15xx parts, see Section 17 References. 2. Features and benefits System: ARM Cortex-M3 processor (version r2p1), running at frequencies of up to 72 MHz. ARM Cortex-M3 built-in Nested Vectored Interrupt Controller (NVIC). System tick timer. Serial Wire Debug (SWD) with four breakpoints and two watchpoints. Single-cycle multiplier supported. Memory Protection Unit (MPU) included. Memory: Up to 256 kB on-chip flash programming memory with 256 Byte page write and erase. Up to 36 kB SRAM. 4 kB EEPROM.LPC15xx NXP Semiconductors 32-bit ARM Cortex-M3 microcontroller ROM API support: Boot loader with boot options from flash or external source via USART, C CAN, or USB USB drivers ADC drivers SPI drivers USART drivers I2C drivers Power profiles and power mode configuration with low-power mode configuration option DMA drivers C CAN drivers Flash In-Application Programming (IAP) and In-System Programming (ISP). Digital peripherals: Simple DMA engine with 18 channels and 20 programmable input triggers. High-speed GPIO interface with up to 76 General-Purpose I/O (GPIO) pins with configurable pull-up/pull-down resistors, open-drain mode, input inverter, and programmable digital glitch filter. GPIO interrupt generation capability with boolean pattern-matching feature on eight external inputs. Two GPIO grouped port interrupts. Switch matrix for flexible configuration of each I/O pin function. CRC engine. Quadrature Encoder Interface (QEI). Configurable PWM/timer/motor control subsystem: Up to four 32-bit counter/timers or up to eight 16-bit counter/timers or combinations of 16-bit and 32-bit timers. Up to 28 match outputs and 22 configurable capture inputs with input multiplexer. Up to 28 PWM outputs total. Dither engine for improved average resolution of pulse edges. Four State Configurable Timers (SCTimers) for highly flexible, event-driven timing and PWM applications. SCT Input Pre-processor Unit (SCTIPU) for processing timer inputs and immediate handling of abort situations. Integrated with ADC threshold compare interrupts, temperature sensor, and analog comparator outputs for motor control feedback using analog signals. Special-application and simple timers: 24-bit, four-channel, multi-rate timer (MRT) for repetitive interrupt generation at up to four programmable, fixed rates. Repetitive interrupt timer for general purpose use. Windowed Watchdog timer (WWDT). High-resolution 32-bit Real-time clock (RTC) with selectable 1 s or 1 ms time resolution running in the always-on power domain. RTC can be used for wake-up from all low power modes including Deep power-down. LPC15XX All information provided in this document is subject to legal disclaimers. NXP Semiconductors N.V. 2015. All rights reserved. Product data sheet Rev. 1.1 29 April 2015 2 of 107