LPC3130/3131 Low-cost, low-power ARM926EJ-S MCUs with high-speed USB 2.0 OTG, SD/MMC, and NAND flash controller Rev. 2 29 May 2012 Product data sheet 1. General description The NXP LPC3130/3131 combine an 180 MHz ARM926EJ-S CPU core, high-speed USB 2.0 On-The-Go (OTG), up to 192 KB SRAM, NAND flash controller, flexible external bus interface, four channel 10-bit ADC, and a myriad of serial and parallel interfaces in a single chip targeted at consumer, industrial, medical, and communication markets. To optimize system power consumption, the LPC3130/3131 have multiple power domains and a very flexible Clock Generation Unit (CGU) that provides dynamic clock gating and scaling. 2. Features and benefits 2.1 Key features CPU platform 180 MHz, 32-bit ARM926EJ-S 16 kB D-cache and 16 kB I-cache Memory Management Unit (MMU) Internal memory 96 kB (LPC3130) or 192 kB (LPC3131) embedded SRAM External memory interface NAND flash controller with 8-bit ECC 8/16-bit Multi-Port Memory Controller (MPMC): SDRAM and SRAM Communication and connectivity High-speed USB 2.0 (OTG, Host, Device) with on-chip PHY 2 Two I S-bus interfaces Integrated master/slave SPI 2 Two master/slave I C-bus interfaces Fast UART Memory Card Interface (MCI): MMC/SD/SDIO/CE-ATA Four-channel 10-bit ADC Integrated 4/8/16-bit 6800/8080 compatible LCD interface System functions Dynamic clock gating and scaling Multiple power domains Selectable boot-up: SPI flash, NAND flash, SD/MMC cards, UART, or USB DMA controllerLPC3130/3131 NXP Semiconductors Low-cost, low-power ARM926EJ-S microcontrollers Four 32-bit timers Watchdog timer PWM module Random Number Generator (RNG) General Purpose I/O (GPIO) pins Flexible and versatile interrupt structure JTAG interface with boundary scan and ARM debug access Operating voltage and temperature Core voltage: 1.2 V I/O voltage: 1.8 V, 3.3 V Temperature: 40 C to +85 C 2 TFBGA180 package: 12 12 mm , 0.8 mm pitch 3. Ordering information Table 1. Ordering information Type number Package Name Description Version LPC3130FET180 TFBGA180 plastic thin fine pitch ball grid array package, 180 balls, body 12 12 0.8 mm SOT570-3 LPC3131FET180 TFBGA180 plastic thin fine pitch ball grid array package, 180 balls, body 12 12 0.8 mm SOT570-3 Table 2. Ordering options for LPC3130/3131 2 Type number Core/bus Total High-speed 10-bit I S-bus/ MCI SDHC/ Temperature 2 frequency SRAM USB ADC I C-bus SDIO/ range channels CE-ATA LPC3130FET180 180 MHz/ 96 kB Device/ 4 2 each yes 40 C to +85 C 90 MHz Host/OTG LPC3131FET180 180 MHz/ 192 kB Device/ 4 2 each yes 40 C to +85 C 90 MHz Host/OTG LPC3130 3131 All information provided in this document is subject to legal disclaimers. NXP B.V. 2012. All rights reserved. Product data sheet Rev. 2 29 May 2012 2 of 67