Freescale Semiconductor Document Number: MC56F825X Rev. 4, 06/2014 Technical Data MC56F825x/MC56F824x 44-pin LQFP 48-pin LQFP Case: Case: 2 2 10 x 10 mm 7 x 7 mm 64-pin LQFP MC56F825x/MC56F824x Case: 2 10 x 10 mm Digital Signal Controller The MC56F825x/MC56F824x is a member of the 56800E On-chip features include: core-based family of digital signal controllers (DSCs). It 60 MHz operation frequency combines, on a single chip, the processing power of a DSP DSP and MCU functionality in a unified, C-efficient and the functionality of a microcontroller with a flexible set of architecture peripherals to create a cost-effective solution. Because of its On-chip memory low cost, configuration flexibility, and compact program 56F8245/46: 48 KB (24K x 16) flash memory 6 KB code, it is well-suited for many applications. The (3K x 16) unified data/program RAM MC56F825x/MC56F824x includes many peripherals that are 56F8247: 48 KB (24K x 16) flash memory 8 KB especially useful for cost-sensitive applications, including: (4K x 16) unified data/program RAM Industrial control 56F8255/56/57: 64 KB (32K x 16) flash memory 8 KB Home appliances (4K x 16) unified data/program RAM Smart sensors eFlexPWM with up to 9 channels, including 6 channels Fire and security systems with high (520 ps) resolution NanoEdge placement Solar inverters Two 8-channel, 12-bit analog-to-digital converters (ADCs) Battery chargers and management with dynamic x2 and x4 programmable amplifier, Switched-mode power supplies and power management conversion time as short as 600 ns, and input Power metering current-injection protection Motor control (ACIM, BLDC, PMSM, SR, and stepper) Three analog comparators with integrated 5-bit DAC Handheld power tools references Arc detection Cyclic Redundancy Check (CRC) Generator Medical devices/equipment Two high-speed queued serial communication interface Instrumentation (QSCI) modules with LIN slave functionality Lighting ballast Queued serial peripheral interface (QSPI) module 2 Two SMBus-compatible inter-integrated circuit (I C) ports The 56800E core is based on a modified Harvard-style Freescales scalable controller area network (MSCAN) 2.0 architecture consisting of three execution units operating in A/B module parallel, allowing as many as six operations per instruction Two 16-bit quad timers (2 x 4 16-bit timers) cycle. The MCU-style programming model and optimized Computer operating properly (COP) watchdog module instruction set allow straightforward generation of efficient, On-chip relaxation oscillator: 8 MHz (400 kHz at standby compact DSP and control code. The instruction set is also mode) highly efficient for C compilers to enable rapid development Crystal/resonator oscillator of optimized control applications. Integrated power-on reset (POR) and low-voltage interrupt The MC56F825x/MC56F824x supports program execution (LVI) and brown-out reset module from internal memories. Two data operands per instruction Inter-module crossbar connection cycle can be accessed from the on-chip data RAM. A full set Up to 54 GPIOs of programmable peripherals supports various applications. 44-pin LQFP, 48-pin LQFP, and 64-pin LQFP packages Each peripheral can be independently shut down to save Single supply: 3.0 V to 3.6 V power. Any pin, except Power pins and the Reset pin, can also be configured as General Purpose Input/Outputs (GPIOs). Freescale reserves the right to change the detail specifications as may be required to permit improvements in the design of its products. Freescale Semiconductor, Inc., 2009-2011, 2014. All rights reserved. Table of Contents 1 MC56F825x/MC56F824x Family Configuration 3 7.6 DC Electrical Characteristics 53 2 Overview 4 7.7 Supply Current Characteristics 55 2.1 MC56F825x/MC56F824x Features .4 7.8 Power-On Reset, Low Voltage Detection Specification 56 2.2 Award-Winning Development Environment 8 7.9 Voltage Regulator Specifications . 56 2.3 Architecture Block Diagram 8 7.10 AC Electrical Characteristics 56 2.4 Product Documentation 11 7.11 Enhanced Flex PWM Characteristics . 57 3 Signal/Connection Descriptions .11 7.12 Flash Memory Characteristics . 57 3.1 Introduction 11 7.13 External Clock Operation Timing . 57 3.2 Pin Assignment .15 7.14 Phase Locked Loop Timing . 58 3.3 MC56F825x/MC56F824x Signal Pins 18 7.15 External Crystal or Resonator Requirement 59 4 Memory Maps .29 7.16 Relaxation Oscillator Timing 59 4.1 Introduction 29 7.17 Reset, Stop, Wait, Mode Select, and Interrupt Timing. 60 4.2 Program Map 30 7.18 Queued Serial Peripheral Interface (SPI) Timing 60 4.3 Data Map .31 7.19 Queued Serial Communication Interface (SCI) Timing 64 4.4 Interrupt Vector Table and Reset Vector 33 7.20 Freescales Scalable Controller Area Network (MSCAN)65 4.5 Peripheral Memory-Mapped Registers .34 7.21 Inter-Integrated Circuit Interface (I2C) Timing . 65 4.6 EOnCE Memory Map 35 7.22 JTAG Timing 66 5 General System Control Information .36 7.23 Quad Timer Timing . 67 5.1 Overview 36 7.24 COP Specifications . 68 5.2 Power Pins 36 7.25 Analog-to-Digital Converter (ADC) Parameters 68 5.3 Reset .36 7.26 Digital-to-Analog Converter (DAC) Parameters 70 5.4 On-chip Clock Synthesis 37 7.27 5-Bit Digital-to-Analog Converter (DAC) Parameters . 71 5.5 Interrupt Controller 39 7.28 HSCMP Specifications . 71 5.6 System Integration Module (SIM) .39 7.29 Optimize Power Consumption . 71 5.7 Inter-Module Connections .40 8 Design Considerations . 72 5.8 Joint Test Action Group (JTAG)/Enhanced On-Chip 8.1 Thermal Design Considerations . 72 Emulator (EOnCE) 46 8.2 Electrical Design Considerations . 73 6 Security Features 46 9 Ordering Information . 74 6.1 Operation with Security Enabled 46 10 Package Mechanical Outline Drawings . 76 6.2 Flash Access Lock and Unlock Mechanisms 47 10.1 44-pin LQFP 76 6.3 Product Analysis 48 10.2 48-pin LQFP 79 7 Specifications .48 10.3 64-pin LQFP 81 7.1 General Characteristics 48 11 Revision History 84 7.2 Absolute Maximum Ratings .49 Appendix A 7.3 ESD Protection and Latch-up Immunity 50 Interrupt Vector Table 85 7.4 Thermal Characteristics 50 7.5 Recommended Operating Conditions 52 MC56F825x/MC56F824x Digital Signal Controller, Rev. 4 2 Freescale Semiconductor