MCF5282 Product Summary Page
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MCF5282 : Integrated ColdFire Version 2 Microcontroller
The MCF5282 is the first microcontroller based on Freescale Semiconductor's 32-bit
ColdFire core integrated with Ethernet, Flash and CAN. This device offers advanced
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communications features, a rich peripheral set and a variety of supporting software and
development tools.
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The MCF5282 is designed to simplify embedded Ethernet-networked microcontroller
applications. With its integrated 10/100 Mbps Ethernet MAC and network-ready
applications software, the MCF5282 can bring standards-based networking to a variety
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of traditional MCU applications including food service equipment, security systems,
vending machines, exercise equipment and industrial controllers. Applications in all of
these areas will benefit from networking functions such as Web-based user interfaces,
network time synchronization, and router/gateway functionality for legacy serial
protocols.
To learn about the flashless version of the MCF5282 visit the MCF5280 Product
Summary Page.
Block Diagram
MCF5282 Features
V2 ColdFire core delivering 76 (Dhrystone 2.1) MIPS at 80 MHz running from
Cache/RAM (max running from internal flash 66 MIPS)
512KB embedded flash memory
Enhanced Multiply-Accumulate Unit (eMAC) for DSP functionality
64 Kbytes of static RAM
10/100 Ethernet MAC
Cache for external access support
Address decode and chip selects
CAN 2.0B controller area network interface with 16 message buffers
Three UARTs with DMA capability
Queued serial peripheral interface (QSPI) with four peripheral chip selects
8-channel 10-bit queued analog-to-digital converter (QADC)
Four 32-bit timers with capture, compare and DMA capability
Eight 16-bit timer channels for capture, compare, and pulse width modulation
Four periodic interrupt timers (PITs)
2
I C bus controller
MCF5282 Product Summary Page
JTAG for board testing
BDM for debug, including real-time trace
17 mm x 17 mm x 1.6 mm 256-ball MAPBGA package
Operation at 66 and 80 MHz from -40C to +85C
Available at 66MHz delivering 63 (Dhrystone 2.1) MIPS running from Cache/
RAM (max running from internal flash 54 MIPS)
Available software package including real-time operating system and network
protocol stack with support for IP, UDP, TCP, ARP, DHCP, ICMP, SNTP,
HTTP, and TFTP protocols
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Core
Operating Power I/O Operating Ambient Ambient
CPU Performance Operating Integrated
Frequency Dissipation Voltage Temp Temp
(Max) Voltage Memory
(Max) (Typ) (Max) (Min) (Max)
(MIPS) (Spec) Controller
(MHz) (W) (V) (oC) (oC)
(V)
54, 66,
0.72 3.3 5 -40 85 SDRAM
66 80
A/D Converter
L1 Cache Instructional L1 Cache Data
Internal RAM
(Max) (Max) A/D Converter-Y/N GPIO Pins Bus Interface
Bits
(KByte)
Channels
(kByte) (kByte)
(bit)
2 2 64 Yes 8 10 150 32-bit
External
Serial Interface Timers
Bus
Chip
Speed Other Peripherals Package Description Availability
Selects
(Max)
Type Channels
(MHz)
512KB Flash,
FlexCAN, DMA Controller,
I2C, EMAC,
66,
MAC (FEC) 10/100 Ethernet, 7 4 Interrupt Controller, MAPBGA 256 17*17*0.8P1.0 Production Now
80
QSPI, JTAG,
UART PLL,
Watchdog Timer