Document Number: IMXRT1060CEC NXP Semiconductors Rev. 2, 03/2021 Data Sheet: Technical Data MIMXRT1061DVL6A MIMXRT1061DVL6B MIMXRT1061DVJ6A MIMXRT1061DVJ6B MIMXRT1062DVL6A MIMXRT1062DVL6B MIMXRT1062DVJ6A MIMXRT1062DVJ6B MIMXRT106ADVL6A MIMXRT106ADVL6B MIMXRT106FDVL6A MIMXRT106FDVL6B i.MX RT1060 Crossover MIMXRT106LDVL6A MIMXRT106LDVL6B MIMXRT106SDVL6B Processors for Consumer Products Package Information Plastic Package 196-pin MAPBGA, 10 x 10 mm, 0.65 mm pitch 196-pin MAPBGA, 12 x 12 mm, 0.8 mm pitch Ordering Information See Table 1 on page 6 1 i.MX RT1060 Introduction The i.MX RT1060 is a new processor family featuring 1. i.MX RT1060 Introduction 1 1.1. Features 2 NXPs advanced implementation of the Arm 1.2. Ordering information . 6 Cortex -M7 core, which operates at speeds up to 600 2. Architectural Overview . 11 2.1. Block diagram . 11 MHz to provide high CPU performance and best 3. Modules List . 12 real-time response. 3.1. Special signal considerations . 19 3.2. Recommended connections for unused analog The i.MX RT1060 processor has 1 MB on-chip RAM. interfaces . 20 4. Electrical Characteristics 22 512 KB can be flexibly configured as TCM or general 4.1. Chip-Level conditions . 22 purpose on-chip RAM, while the other 512 KB is 4.2. System power and clocks 29 general-purpose on-chip RAM. The i.MX RT1060 4.3. I/O parameters 34 4.4. System modules . 41 integrates advanced power management module with 4.5. External memory interface . 46 DCDC and LDO that reduces complexity of external 4.6. Display and graphics 56 4.7. Audio 59 power supply and simplifies power sequencing. The 4.8. Analog . 62 i.MX RT1060 also provides various memory interfaces, 4.9. Communication interfaces 69 including SDRAM, RAW NAND FLASH, NOR 4.10. Timers . 82 5. Boot mode configuration 84 FLASH, SD/eMMC, Quad SPI, and a wide range of 5.1. Boot mode configuration pins . 84 other interfaces for connecting peripherals, such as 5.2. Boot device interface allocation 84 6. Package information and contact assignments . 89 WLAN, Bluetooth, GPS, displays, and camera 6.1. 10 x 10 mm package information 89 sensors. The i.MX RT1060 has rich audio and video 6.2. 12 x 12 mm package information . 101 features, including LCD display, basic 2D graphics, 7. Revision history . 113 camera interface, SPDIF, and I2S audio interface. The i.MX RT1060 has analog interfaces, such as ADC, ACMP, and TSC. NXP reserves the right to change the production detail specifications as may be required to permit improvements in the design of its products.i.MX RT1060 Introduction The i.MX RT1060 is specifically useful for applications such as: Industrial Human Machine Interfaces (HMI) Motor Control Home Appliance 1.1 Features The i.MX RT1060 processors are based on Arm Cortex-M7 Core Platform, which has the following features: Supports single Arm Cortex-M7 Core with: 32 KB L1 Instruction Cache 32 KB L1 Data Cache Full featured Floating Point Unit (FPU) with support of the VFPv5 architecture Support the Armv7-M Thumb instruction set Integrated MPU, up to 16 individual protection regions Tightly coupled GPIOs, operating at the same frequency as Arm Core Up to 512 KB I-TCM and D-TCM in total Frequency of 600 MHz Cortex M7 CoreSight components integration for debug Frequency of the core, as per Table 10,Operating ranges on page 24. The SoC-level memory system consists of the following additional components: Boot ROM (128 KB) On-chip RAM (1 MB) 512 KB OCRAM shared between ITCM/DTCM and OCRAM Dedicate 512 KB OCRAM External memory interfaces: 8/16-bit SDRAM, up to SDRAM-133/SDRAM-166 8/16-bit SLC NAND FLASH, with ECC handled in software SD/eMMC SPI NOR/NAND FLASH Parallel NOR FLASH with XIP support Two single/dual channel Quad SPI FLASH with XIP support Timers and PWMs: Two General Programmable Timers (GPT) 4-channel generic 32-bit resolution timer for each Each support standard capture and compare operation Four Periodical Interrupt Timers (PIT) Generic 32-bit resolution timer i.MX RT1060 Crossover Processors for Consumer Products, Rev. 2, 03/2021 2 NXP Semiconductors