Document Number: IMXRT1064CEC NXP Semiconductors Rev. 3, 03/2021 Data Sheet: Technical Data MIMXRT1064DVL6A MIMXRT1064DVL6B MIMXRT1064DVJ6A MIMXRT1064DVJ6B i.MX RT1064 Crossover Processors Data Sheet for Consumer Products Package Information Plastic Package 196-pin MAPBGA, 10 x 10 mm, 0.65 mm pitch 196-pin MAPBGA, 12 x 12 mm, 0.8 mm pitch Ordering Information See Table 1 on page 6 1 i.MX RT1064 Introduction The i.MX RT1064 is a new processor family featuring 1. i.MX RT1064 Introduction 1 1.1. Features 2 NXPs advanced implementation of the Arm 1.2. Ordering information . 6 Cortex -M7 core, which operates at speeds up to 600 2. Architectural Overview 8 2.1. Block diagram 8 MHz to provide high CPU performance and best 3. Modules List 9 real-time response. 3.1. Special signal considerations . 16 3.2. Recommended connections for unused analog The i.MX RT1064 processor has 4 MB on chip Flash and interfaces . 17 4. Electrical Characteristics 19 1 MB on-chip RAM. 512 KB SRAM can be flexibly 4.1. Chip-Level conditions . 19 configured as TCM or general-purpose on-chip RAM, 4.2. System power and clocks 26 while the other 512 KB SRAM is general-purpose 4.3. I/O parameters 31 4.4. System modules . 38 on-chip RAM. The i.MX RT1064 integrates advanced 4.5. External memory interface . 43 power management module with DCDC and LDO that 4.6. Display and graphics 53 4.7. Audio 56 reduces complexity of external power supply and 4.8. Analog . 59 simplifies power sequencing. The i.MX RT1064 also 4.9. Communication interfaces 66 provides various memory interfaces, including SDRAM, 4.10. Timers . 79 5. Flash . 81 RAW NAND FLASH, NOR FLASH, SD/eMMC, Quad 6. Boot mode configuration 82 SPI, and a wide range of other interfaces for connecting 6.1. Boot mode configuration pins . 82 6.2. Boot device interface allocation 82 peripherals, such as WLAN, Bluetooth, GPS, 7. Package information and contact assignments . 87 displays, and camera sensors. The i.MX RT1064 has rich 7.1. 10 x 10 mm package information 87 audio and video features, including LCD display, basic 7.2. 12 x 12 mm package information 99 8. Revision history . 111 2D graphics, camera interface, SPDIF, and I2S audio NXP reserves the right to change the production detail specifications as may be required to permit improvements in the design of its products.i.MX RT1064 Introduction interface. The i.MX RT1064 has analog interfaces, such as ADC, ACMP, and TSC. The i.MX RT1064 is specifically useful for applications such as: Industrial Human Machine Interfaces (HMI) Motor Control Home Appliance 1.1 Features The i.MX RT1064 processors are based on Arm Cortex-M7 Core Platform, which has the following features: Supports single Arm Cortex-M7 Core with: 32 KB L1 Instruction Cache 32 KB L1 Data Cache Full featured Floating Point Unit (FPU) with support of the VFPv5 architecture Support the Armv7-M Thumb instruction set Integrated MPU, up to 16 individual protection regions Tightly coupled GPIOs, operating at the same frequency as Arm core Up to 512 KB I-TCM and D-TCM in total Frequency of 600/528 MHz Cortex M7 CoreSight components integration for debug Frequency of the core, as per Table 10,Operating ranges on page 21. The SoC-level memory system consists of the following additional components: Boot ROM (128 KB) On-chip Flash (4 MB) On-chip RAM (1 MB) 512 KB OCRAM shared between ITCM/DTCM and OCRAM Dedicate 512 KB OCRAM External memory interfaces: 8/16-bit SDRAM, up to SDRAM-133/SDRAM-166 8/16-bit SLC NAND FLASH, with ECC handled in software SD/eMMC SPI NOR/NAND FLASH Parallel NOR FLASH with XIP support Two single/dual channel Quad SPI FLASH with XIP support Timers and PWMs: Two General Programmable Timers (GPT) 4-channel generic 32-bit resolution timer Each support standard capture and compare operation i.MX RT1064 Crossover Processors Data Sheet for Consumer Products, Rev. 3, 03/2021 2 NXP Semiconductors