MK20DN512VMC10 NXP

Document Number: K20P121M100SF2V2 Freescale Semiconductor Rev. 3, 6/2013 Data Sheet: Technical Data K20P121M100SF2V2 K20 Sub-Family Supports the following: MK20DX256VMC10, MK20DN512VMC10 Features Human-machine interface Operating Characteristics Low-power hardware touch sensor interface (TSI) Voltage range: 1.71 to 3.6 V General-purpose input/output Flash write voltage range: 1.71 to 3.6 V Analog modules Temperature range (ambient): -40 to 105C Two 16-bit SAR ADCs Performance Programmable gain amplifier (PGA) (up to x64) Up to 100 MHz ARM Cortex-M4 core with DSP integrated into each ADC instructions delivering 1.25 Dhrystone MIPS per Two 12-bit DACs MHz Two transimpedance amplifiers Three analog comparators (CMP) containing a 6-bit Memories and memory interfaces DAC and programmable reference input Up to 512 KB program flash memory on non- Voltage reference FlexMemory devices Up to 256 KB program flash memory on Timers FlexMemory devices Programmable delay block Up to 256 KB FlexNVM on FlexMemory devices Eight-channel motor control/general purpose/PWM 4 KB FlexRAM on FlexMemory devices timer Up to 128 KB RAM Two 2-channel quadrature decoder/general purpose Serial programming interface (EzPort) timers FlexBus external bus interface Periodic interrupt timers 16-bit low-power timer Clocks Carrier modulator transmitter 3 to 32 MHz crystal oscillator Real-time clock 32 kHz crystal oscillator Multi-purpose clock generator Communication interfaces USB full-/low-speed On-the-Go controller with on- System peripherals chip transceiver Multiple low-power modes to provide power Two Controller Area Network (CAN) modules optimization based on application requirements Three SPI modules Memory protection unit with multi-master Two I2C modules protection Six UART modules 16-channel DMA controller, supporting up to 63 Secure Digital host controller (SDHC) request sources I2S module External watchdog monitor Software watchdog Low-leakage wakeup unit Security and integrity modules Hardware CRC module to support fast cyclic redundancy checks 128-bit unique identification (ID) number per chip Freescale reserves the right to change the detail specifications as may be required to permit improvements in the design of its products. 20122013 Freescale Semiconductor, Inc. This page intentionally blank. K20 Sub-Family Data Sheet, Rev. 3, 6/2013. 2 Freescale Semiconductor, Inc.