NXP Semiconductors KV31P100M120SF8 Data Sheet: Technical Data Rev. 8, 06/2020 Kinetis KV31F 256 KB Flash MKV31F256VLL12 120 MHz Arm Cortex-M4-Based Microcontroller with FPU MKV31F256VLH12 The KV31 MCU family is a highly scalable member of the Kinetis V Series and provides a high-performance, cost-competitive motor control solution. Built on the Arm Cortex -M4 core running at 120 MHz, combined with floating point and DSP capability, it delivers a highly capable platform enabling customers to build a highly scalable solution portfolio. Additional features include: 100 LQFP (LL) 64 LQFP (LH) Dual 16-bit ADCs sampling at up to 1.2 MS/s in 12-bit 14 x 14 x 1.4 Pitch 0.5 10 x 10 x 1.4 Pitch 0.5 mode mm mm 12 channels of highly flexible motor control timers (PWMs) across 3 independent time bases Large RAM block enabling local execution of fast control loops at full clock speed Performance Analog modules 120 MHz Arm Cortex-M4 core with DSP instructions Two 16-bit SAR ADCs (1.2 MS/s in 12bit mode) delivering 1.25 Dhrystone MIPS per MHz One 12-bit DAC Two analog comparators (CMP) with 6- bit DAC Memories and memory interfaces Accurate internal voltage reference 256 KB of embedded flash and 48 KB of RAM Preprogrammed Kinetis flashloader for one-time, in- Communication interfaces system factory programming Two SPI modules Three UART modules and one low-power UART System peripherals Two I2C modules: Support for up to 1 Mbps 16-channel DMA controller operation Independent external and software watchdog monitor Timers Clocks One 8-channel motor control/general purpose/ PWM One crystal oscillator, two ranges: 32-40 kHz or 3-32 timer MHz Two 2-channel motor control/general purpose timers Three internal oscillators: 32 kHz, 4 MHz, and 48 MHz with quadrature decoder functionality Multi-purpose clock generator with PLL and FLL Operating Characteristics Security and integrity modules Voltage range (including flash writes): 1.71 to 3.6 V Hardware CRC module Temperature range (ambient): -40 to 105C 128-bit unique identification (ID) number per chip Hardware random-number generator Flash access control to protect proprietary software Human-machine interface Up to 70 general-purpose I/O (GPIO) NXP reserves the right to change the production detail specifications as may be required to permit improvements in the design of its products.Ordering Information Orderable Part Part Number Marking Memory Package Maximum number of Number Configuration I/O s MKV31F256VLL12 MKV31F256VLL12 256 KB Flash 100 LQFP 70 48 KB SRAM (14x14x1.7mm) MKV31F256VLH12 MKV31F256VLH12 256 KB Flash 64 LQFP 46 48 KB SRAM (10x10x1.6mm) Device Revision Number Device Mask Set Number SIM SDID REVID JTAG ID Register PRN 0N51M 0001 0001 Related Resources Type Description Resource Selector The NXP Solution Advisor is a web-based tool that features interactive Product Selector Guide application wizards and a dynamic product selector Product Brief The Product Brief contains concise overview/summary information to KV30FKV31FPB enable quick evaluation of a device for design suitability. Reference The Reference Manual contains a comprehensive description of the KV31P100M120SF8RM Manual structure and function (operation) of a device. Data Sheet The Data Sheet is this document. It includes electrical characteristics KV31P100M120SF8 and signal connections. Chip Errata The chip mask set Errata provides additional or corrective information for KINETIS V xN51M a particular device mask set. Package Package dimensions are provided by part number: Package drawing: drawing MKV31F256VLL12 98ASS23308W MKV31F256VLH12 98ASS23234W Figure 1 shows the functional modules in the chip. 2 Kinetis KV31F 256 KB Flash, Rev. 8, 06/2020 NXP Semiconductors