Document Number: MMPF0100 Freescale Semiconductor Rev. 12.0, 9/2015 Advance Information 14 Channel Configurable Power PF0100 Management Integrated Circuit The PF0100 SMARTMOS Power Management Integrated Circuit (PMIC) provides a highly programmable/ configurable architecture, POWER MANAGEMENT with fully integrated power devices and minimal external components. With up to six buck converters, six linear regulators, RTC supply, and coin-cell charger, the PF0100 can provide power for a complete system, including applications processors, memory, and system peripherals, in a wide range of applications. With on-chip One Time Programmable (OTP) memory, the PF0100 is available in pre- programmed standard versions, or non-programmed to support custom programming. The PF0100 is defined to power an entire embedded MCU platform solution such as i.MX 6 based eReader, EP SUFFIX (E-TYPE) ES SUFFIX (WF-TYPE) IPTV, medical monitoring, and home/factory automation. 98ASA00405D 98ASA00589D 56 QFN 8X8 56 QFN 8X8 Applications: Features: Tablets Four to six buck converters, depending on configuration IPTV Single/Dual phase/ parallel options eReaders DDR termination tracking mode option Set Top Boxes Boost regulator to 5.0 V output Industrial control Six general purpose linear regulators Medical monitoring Programmable output voltage, sequence, and timing Home automation/ alarm/ energy management OTP (One Time Programmable) memory for device configuration Coin cell charger and RTC supply DDR termination reference voltage Power control logic with processor interface and event detection 2 I C control Individually programmable ON, OFF, and Standby modes PF0100 i.MX 6X VREFDDR DDR MEMORY SW4 DDR Memory INTERFACE 1000 mA SW3A/B 2500 mA SW1A/B Processor Core 2500 mA Voltages SW1C 2000 mA External AMP Microphones SW2 Speakers SATA - FLASH 2000 mA SD-MMC/ SATA NAND - NOR NAND Mem. HDD SWBST Interfaces Audio 600 mA Codec Parallel control/GPIOS Control Signals 2 2 Sensors I C Communication I C Communication VGEN1 Camera 100 mA Camera VGEN2 GPS WAM 250 mA MIPI GPS uPCIe VGEN3 MIPI 100 mA VGEN4 HDMI 350 mA LDVS Display VGEN5 100 mA USB LICELL VGEN6 Ethernet Charger 200 mA CAN Main Supply COINCELL 2.8 4.5 V Front USB Rear Seat Rear USB Cluster/HUD POD Infotaiment POD Figure 1. Simplified Application Diagram * This document contains certain information on a new product. Specifications and information herein are subject to change without notice. Freescale Semiconductor, Inc., 2012-2015. All rights reserved.Table of Contents 1 Orderable Parts . 4 2 Internal Block Diagram . 6 3 Pin Connections 7 3.1 Pinout Diagram . 7 3.2 Pin Definitions 8 4 General Product Characteristics . 11 4.1 Absolute Maximum Ratings . 11 4.2 Thermal Characteristics 12 4.2.1 Power Dissipation 13 4.3 Electrical Characteristics . 13 4.3.1 General Specifications 13 4.3.2 Current Consumption . 15 5 General Description 17 5.1 Features 17 5.2 Functional Block Diagram 18 5.3 Functional Description . 18 5.3.1 Power Generation 18 5.3.2 Control Logic 18 6 Functional Block Requirements and Behaviors . 20 6.1 Start-up 20 6.1.1 Device Start-up Configuration . 20 6.1.2 One Time Programmability (OTP) 23 6.1.3 OTP Prototyping . 25 6.1.4 Reading OTP Fuses 25 6.1.5 Programming OTP Fuses 26 6.2 16 MHz and 32 kHz Clocks . 26 6.2.1 Clock adjustment . 26 6.3 Bias and References Block Description 27 6.3.1 Internal Core Voltage References 27 6.3.2 VREFDDR Voltage Reference 27 6.4 Power Generation 30 6.4.1 Modes of Operation . 30 6.4.2 State Machine Flow Summary 33 6.4.3 Power Tree . 34 6.4.4 Buck Regulators . 37 6.4.5 Boost Regulator . 88 6.4.6 LDO Regulators Description 91 6.4.7 VSNVS LDO/Switch . 109 6.5 Control Interface I2C Block Description . 114 6.5.1 I2C Device ID 114 6.5.2 I2C Operation 114 6.5.3 Interrupt Handling . 115 6.5.4 Interrupt Bit Summary 115 6.5.5 Specific Registers . 120 6.5.6 Register Bitmap . 122 PF0100 Analog Integrated Circuit Device Data 2 Freescale Semiconductor