NX5P3201 3 A USB power switch and 6 A high-side load switch Rev. 1 11 December 2015 Product data sheet 1. General description The NX5P3201 is an advanced dual power switch consisting of two independent switches. They are, an advanced 3 A bidirectional power switch (SWP) for USB OTG and charger port applications, and a high-side 6 A load switch (SW5). SWP includes an open-drain status indicator. It also consists of OverTemperature Protection (OTP), UnderVoltage LockOut (UVLO) and OverVoltage LockOut (OVLO) protection circuits. The OVLO circuit isolates the pin VBUS when more than 6.55 V is applied to pin VBUS via the USB connector. To prevent unnecessary switching due to ringing on pins VBUS or PMU, the UVLO circuits include a 15 ms turn-on delay. This deglitch function allows the applied voltage to stabilize above V before closing SWP. UVLO SW5 consists of OTP, Reverse Current Protection (RCP), and UVLO protection circuits. The UVLO isolates VBAT from VIN until V exceeds V . If the voltage at VBAT exceeds I UVLO V by 30 mV, the RCP circuit isolates VBAT from VIN. It prevents damage to devices on I the input side of the switch. Both switches include slew rate controlled inrush current reduction to prevent damage when switching high capacitive loads. 2. Features and benefits 28 V tolerant VBUS supply pin Wide supply voltage range from 3.4 V to 6.55 V for SWP and 2.7 V to 5.5 V for SW5 Automatic SWP operation I continuous current: 3 A for SWP and 6 A for SW5 SW Low ON resistance: 32 m (typical) for SWP and 8 m (typical) for SW5 Soft-start, slew rate controlled turn-on time Status indicator output Protection circuitry Reverse current protection Overtemperature protection Overvoltage lockout Undervoltage lockout ESD protection: IEC61000-4-2 contact discharge exceeds 8 kV for pin VBUS HBM JS-001-2012 class 3 A exceeds 4 kV IEC61000-4-5 surge test exceeds 100 V for pin VBUS Specified from 40 C to +85 C ambient temperature NX5P3201 NXP Semiconductors 3 A USB power switch and 6 A high-side load switch 3. Applications Smartphone and feature phones Tablets and e-books 4. Ordering information Table 1. Ordering information Type number Package Name Description Version NX5P3201CUK WLCSP30 wafer level chip-scale package 30 bumps 2.26 2.56 0.51 mm SOT1443-2 (backside coating included) 5. Marking Table 2. Marking codes Type number Marking code NX5P3201CUK 5P32C 6. Functional diagram SW5 VIN VBAT SWP VBUS PMU EN5 ENP ACOK aaa-018349 Fig 1. Logic symbol NX5P3201 All information provided in this document is subject to legal disclaimers. NXP Semiconductors N.V. 2015. All rights reserved. Product data sheet Rev. 1 11 December 2015 2 of 25